{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T03:55:42Z","timestamp":1725508542937},"reference-count":0,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006,8]]},"DOI":"10.1109\/hotchips.2006.7477750","type":"proceedings-article","created":{"date-parts":[[2016,7,4]],"date-time":"2016-07-04T21:06:46Z","timestamp":1467666406000},"page":"1-27","source":"Crossref","is-referenced-by-count":0,"title":["The next generation 65-nm FPGA"],"prefix":"10.1109","author":[{"given":"Steve","family":"Douglass","sequence":"first","affiliation":[]},{"given":"Kees","family":"Vissers","sequence":"additional","affiliation":[]},{"given":"Peter","family":"Alfke","sequence":"additional","affiliation":[]}],"member":"263","event":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","start":{"date-parts":[[2006,8,20]]},"location":"Stanford, CA, USA","end":{"date-parts":[[2006,8,22]]}},"container-title":["2006 IEEE Hot Chips 18 Symposium (HCS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7470195\/7477736\/07477750.pdf?arnumber=7477750","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T16:13:46Z","timestamp":1489767226000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7477750\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,8]]},"references-count":0,"URL":"https:\/\/doi.org\/10.1109\/hotchips.2006.7477750","relation":{},"subject":[],"published":{"date-parts":[[2006,8]]}}}