{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T00:37:15Z","timestamp":1725583035142},"reference-count":0,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006,8]]},"DOI":"10.1109\/hotchips.2006.7477862","type":"proceedings-article","created":{"date-parts":[[2016,7,4]],"date-time":"2016-07-04T17:06:46Z","timestamp":1467652006000},"page":"1-28","source":"Crossref","is-referenced-by-count":1,"title":["ARM996HS\u2122 the first licensable, clockless 32-bit processor core"],"prefix":"10.1109","author":[{"given":"Arjan","family":"Bink","sequence":"first","affiliation":[]},{"given":"Richard","family":"York","sequence":"additional","affiliation":[]}],"member":"263","event":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","start":{"date-parts":[[2006,8,20]]},"location":"Stanford, CA, USA","end":{"date-parts":[[2006,8,22]]}},"container-title":["2006 IEEE Hot Chips 18 Symposium (HCS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7470195\/7477736\/07477862.pdf?arnumber=7477862","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T12:16:13Z","timestamp":1489752973000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7477862\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,8]]},"references-count":0,"URL":"https:\/\/doi.org\/10.1109\/hotchips.2006.7477862","relation":{},"subject":[],"published":{"date-parts":[[2006,8]]}}}