{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:34:46Z","timestamp":1772724886826,"version":"3.50.1"},"reference-count":38,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/hpca.2003.1183520","type":"proceedings-article","created":{"date-parts":[[2003,8,27]],"date-time":"2003-08-27T11:38:00Z","timestamp":1061984280000},"page":"7-18","source":"Crossref","is-referenced-by-count":60,"title":["Variability in architectural simulations of multi-threaded workloads"],"prefix":"10.1109","author":[{"given":"A.R.","family":"Alarneldeen","sequence":"first","affiliation":[]},{"given":"D.A.","family":"Wood","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref38","first-page":"24","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003568"},{"key":"ref32","first-page":"45","article-title":"Automatically Characterizing Large Scale Program Behavior","author":"sherwood","year":"2000","journal-title":"Proceedings of the Tenth International Conference on Architectural Support for Programming Languages and Operating Systems"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2001.953283"},{"key":"ref30","article-title":"Time Varying Behavior of Programs","author":"sherwood","year":"1999","journal-title":"Technical report UC San Diego Technical Report UCSD-CS99-630"},{"key":"ref37","year":"0","journal-title":"Virtutech Simics a full system simulator"},{"key":"ref36","year":"2001"},{"key":"ref35","year":"0","journal-title":"Transaction Processing Performance Council TPC-C"},{"key":"ref34","year":"0","journal-title":"Systems Performance Evaluation Cooperation SPEC Benchmarks"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/200883.200890"},{"key":"ref11","first-page":"69","article-title":"The YAGS Branch Prediction Scheme","author":"nomik eden","year":"1998","journal-title":"Proceedings of the 25th Annual International Symposium on Computer Architecture"},{"key":"ref12","author":"frank","year":"1994","journal-title":"Statistics Concepts and Applications"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379000"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.1996.552555"},{"key":"ref15","article-title":"Memory Characterization of the ECperf Benchmark","author":"martin","year":"2002","journal-title":"Second Annual Workshop on Memory Performance Issues (WMPI) in conjunction with ISCA-29"},{"key":"ref16","first-page":"15","article-title":"Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads","author":"kimberly","year":"1998","journal-title":"Proceedings of the 25th Annual International Symposium on Computer Architecture"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/12.286300"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.1998.727263"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1993.698562"},{"key":"ref28","article-title":"MemorIES: A Programmable, Real-Time Hardware Emulation Tool for Multiprocessor Server Design","author":"nanda","year":"2000","journal-title":"Proceedings of the Ninth International Conference on Architectural Support for Programming Languages and Operating Systems"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1147\/rd.446.0885"},{"key":"ref27","article-title":"The Design of COMPASS: An Execution Driven Simulator for Commercial Applications Running on Shared Memory Multiprocessors","author":"ashwini","year":"1998","journal-title":"Proceedings of the 12th International Parallel Processing Symposium"},{"key":"ref3","first-page":"282","article-title":"Piranha: a scalable architecture based on single-chip multiprocessing","author":"barroso","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/40.653032"},{"key":"ref29","first-page":"71","article-title":"HLS: Combining Statistical and Symbolic Simulation to Guide Microprocessor Designs","author":"mark","year":"2000","journal-title":"Proceedings of the 27th annual international symposium on Computer architecture"},{"key":"ref5","first-page":"13","article-title":"Precise and Accurate Processor Simulation","author":"cain","year":"2002","journal-title":"Proceedings of the Fifth Workshop on Computer Architecture Evaluation Using Commercial Workloads"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/379240.565338"},{"key":"ref7","author":"cochran","year":"1977","journal-title":"Sampling Techniques"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1998.694758"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1998.694772"},{"key":"ref1","first-page":"30","article-title":"Evaluating Non-deterministic Multi-Threaded Commercial Workloads","author":"alameldeen","year":"2002","journal-title":"Proceedings of the Fifth Workshop on Computer Architecture Evaluation Using Commercial Workloads"},{"key":"ref20","article-title":"Choosing Representative Slices of Program Execution for Microarchitecture Simulations: A Preliminary Application to the Data Stream","author":"lafage","year":"2000","journal-title":"3rd Annual Workshop on Workload Characterization"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"1325","DOI":"10.1109\/12.8699","article-title":"Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems","volume":"37","author":"subhasis","year":"1988","journal-title":"IEEE Transactions on Computers"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2002.995715"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/378993.378998"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/195473.195524"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/511348.511349"}],"event":{"name":"Ninth International Symposium on High-Performance Computer-Architecture. HPCA-9 2003","location":"Anaheim, CA, USA","acronym":"HPCA-03"},"container-title":["The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8433\/26557\/01183520.pdf?arnumber=1183520","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T20:08:59Z","timestamp":1497557339000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1183520\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":38,"URL":"https:\/\/doi.org\/10.1109\/hpca.2003.1183520","relation":{},"subject":[]}}