{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,9]],"date-time":"2025-04-09T06:02:51Z","timestamp":1744178571270},"reference-count":36,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/hpca.2003.1183525","type":"proceedings-article","created":{"date-parts":[[2003,8,27]],"date-time":"2003-08-27T15:38:00Z","timestamp":1061998680000},"page":"65-76","source":"Crossref","is-referenced-by-count":5,"title":["Dynamic data dependence tracking and its application to branch prediction"],"prefix":"10.1109","author":[{"family":"Lei Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Dropsho","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.H.","family":"Albonesi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1999.808579"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/232973.232993"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/291069.291042"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1998.742777"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165161"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/40.491460"},{"key":"ref34","article-title":"Limits of Instruction-Level Parallelism","author":"wall","year":"1993","journal-title":"Technical Report 93\/6"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1998.742769"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937434"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"230","DOI":"10.1145\/384285.379266","article-title":"Energy-Efficient Issue Logic","author":"folegnani","year":"2001","journal-title":"28th International Symposium on Computer Architecture"},{"key":"ref13","first-page":"10","article-title":"Pentium 4 (partially) previewed","author":"glaskowsky","year":"2000","journal-title":"Microprocessor Report"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/277830.277840"},{"key":"ref15","first-page":"225","article-title":"A High-Speed Dynamic Instruction Scheduling Scheme for Superscalar Processors","author":"goshima","year":"2001","journal-title":"IPSJ Transactions on High Performance Computing Systems"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003557"},{"key":"ref17","first-page":"28","article-title":"Improving Branch Predictors by Correlating on Data Values","author":"heil","year":"1999","journal-title":"32nd International Symposium on Microarchitecture"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"67","DOI":"10.1145\/360128.360137","article-title":"The Impact of Delay on the Design of Branch Predictors","author":"jimenez","year":"2000","journal-title":"Proceedings of the 33rd Annual International Symposium on Microarchitecture"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1998.727028"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003559"},{"key":"ref4","article-title":"The Simplescalar Toolset","author":"burger","year":"1997","journal-title":"version 2 0 Technical Report TR-97-1342"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2003.1183524"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/165939.165952"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1999.765940"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937442"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.2002.1158026"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/237090.237171"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/514191.514224"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937451"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1998.742770"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"248","DOI":"10.1145\/342001.339691","article-title":"Clock Rate versus IPC: the End of the Road for Conventional Microarchitectures","author":"agarwal","year":"2000","journal-title":"27th Annual International Symposium on Computer Architecture"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003562"},{"key":"ref22","first-page":"226","article-title":"Exceeding the Data-Flow Limit Via Value Prediction","author":"lipasti","year":"1996","journal-title":"29th International Symposium on Microar-chitecture"},{"key":"ref21","first-page":"4","article-title":"The Bi-Mode Branch Predictor","author":"lee","year":"1995","journal-title":"30th International Symposium on Microarchitecture"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1995.476809"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1997.604715"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003587"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/232973.232978"}],"event":{"name":"Ninth International Symposium on High-Performance Computer-Architecture. HPCA-9 2003","acronym":"HPCA-03","location":"Anaheim, CA, USA"},"container-title":["The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8433\/26557\/01183525.pdf?arnumber=1183525","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,6,10]],"date-time":"2021-06-10T11:06:46Z","timestamp":1623323206000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1183525\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":36,"URL":"https:\/\/doi.org\/10.1109\/hpca.2003.1183525","relation":{},"subject":[]}}