{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,1]],"date-time":"2026-06-01T23:20:44Z","timestamp":1780356044596,"version":"3.54.1"},"reference-count":45,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/hpca.2006.1598114","type":"proceedings-article","created":{"date-parts":[[2006,3,21]],"date-time":"2006-03-21T22:46:16Z","timestamp":1142981176000},"page":"77-87","source":"Crossref","is-referenced-by-count":55,"title":["Dynamic Power-Performance Adaptation of Parallel Computation on Chip Multiprocessors"],"prefix":"10.1109","author":[{"family":"Jian Li","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"J.F.","family":"Martinez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"19","first-page":"199","article-title":"Exploring the design space of future CMPs","author":"huh","year":"2001","journal-title":"International Conference on Parallel Architectures and Compilation Techniques"},{"key":"35","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493929"},{"key":"17","author":"hennessy","year":"2003","journal-title":"Computer Architecture A Quantitative Approach"},{"key":"36","year":"0","journal-title":"OpenMP specifications"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2004.1349339"},{"key":"33","article-title":"Thermal management of CPUs: A perspective on trends, needs and opportunities","author":"majan","year":"2002","journal-title":"Int Workshops Thermal Investigation ICs Syst"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2004.1347928"},{"key":"34","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2001.903254"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1002\/(SICI)1096-9128(19981210)10:14<1235::AID-CPE373>3.0.CO;2-Z"},{"key":"39","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2003.1190238"},{"key":"13","article-title":"Energy conservation policies for web servers","author":"elnozahy","year":"2003","journal-title":"USENIX Symposium on Internet Technologies and Systems"},{"key":"14","article-title":"Design choices for thermal control in dual-core processors","author":"ghiasi","year":"2004","journal-title":"Workshop on Complexity-Effective Design"},{"key":"37","author":"parhi","year":"1999","journal-title":"VLSI Digital Signal Processing Systems"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2003.1240600"},{"key":"38","article-title":"Load balancing and unbalancing for power and performance in cluster-based systems","author":"pinheiro","year":"2001","journal-title":"Workshop on compilers and operating systems for low power"},{"key":"12","first-page":"179","article-title":"Energy-efficient server clusters","author":"elnozahy","year":"2002","journal-title":"Workshop Power Aware Comput Syst"},{"key":"21","year":"0","journal-title":"International Technology Roadmap for Semiconductors (ITRS)"},{"key":"20","year":"2004","journal-title":"Intel Pentium M Processor on 90nm Process with 2-MB L2 Cache Datasheet"},{"key":"43","article-title":"Temperature-aware microarchitecture: Extended discussion and results","volume":"cs 2003 8","author":"skadron","year":"2003","journal-title":"Technical Report"},{"key":"42","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2000.878286"},{"key":"41","first-page":"196","article-title":"Comparing the energy efficiency of CMP and SMT architectures for multimedia workloads","author":"sasanka","year":"2004","journal-title":"International Conference on Supercomputing"},{"key":"40","article-title":"Power efficient cache coherence","author":"saldanha","year":"2001","journal-title":"Workshop on Memory Performance Issues"},{"key":"45","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/ISCA.1995.524546","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"44","doi-asserted-by":"publisher","DOI":"10.1109\/4.509850"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2002.1012715"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269048"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1145\/502217.502254"},{"key":"25","article-title":"Platform 2015 software: Enabling innovation in parallelism for the next decade","author":"kuck","year":"2005","journal-title":"Technical Report"},{"key":"26","doi-asserted-by":"crossref","first-page":"81","DOI":"10.1109\/MICRO.2003.1253185","article-title":"Single-ISA heterogeneous multi-core architectures: The potential for processor power reduction","author":"kumar","year":"2003","journal-title":"International Symposium on Microarchitecture"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2004.1310764"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1023\/A:1009817804059"},{"key":"29","article-title":"Power-Performance implications of thread-level parallelism on chip multiprocessors","author":"li","year":"2005","journal-title":"International Symposium on Performance Analysis of Systems and Software"},{"key":"3","article-title":"Platform 2015: Intel processor and platform evolution for the next decade","author":"borkar","year":"2005","journal-title":"Technical Report"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.36"},{"key":"10","article-title":"Temperature-aware design issues for SMT and CMP architectures","author":"donald","year":"2004","journal-title":"Workshop on ComplexityEffective Design"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.45"},{"key":"30","first-page":"14","article-title":"The Thrifty Barrier: Energy-aware synchronization in shared-memory multiprocessors","author":"li","year":"2004","journal-title":"International Symposium on High-Performance Computer Architecture"},{"key":"7","article-title":"Thermal-effective clustered microarchitectures","author":"chaparro","year":"2004","journal-title":"Workshop on Temperature-Aware Computer Systems"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/4.126534"},{"key":"32","article-title":"Performance, energy, and temperature considerations for SMT and CMP architectures","author":"li","year":"2005","journal-title":"International Symposium on High-Performance Computer Architecture"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/2.362631"},{"key":"31","article-title":"The ALPBench benchmark suite for complex multimedia applications","author":"li","year":"2006","journal-title":"IEEE International Symposium on Workload Characterization"},{"key":"4","first-page":"83","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"brooks","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"9","author":"culler","year":"1999","journal-title":"Parallel Computer Architecture A Hardware\/Software Approach"},{"key":"8","year":"1999","journal-title":"Alpha 21264 Microprocessor Hardware Reference Manual"}],"event":{"name":"The Twelfth International Symposium on High-Performance Computer Architecture, 2006.","location":"Austin, Texas"},"container-title":["The Twelfth International Symposium on High-Performance Computer Architecture, 2006."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10647\/33614\/01598114.pdf?arnumber=1598114","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,6]],"date-time":"2023-05-06T20:50:03Z","timestamp":1683406203000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1598114\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":45,"URL":"https:\/\/doi.org\/10.1109\/hpca.2006.1598114","relation":{},"subject":[]}}