{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,8]],"date-time":"2026-01-08T07:29:02Z","timestamp":1767857342487,"version":"3.49.0"},"reference-count":30,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,2]]},"DOI":"10.1109\/hpca.2008.4658636","type":"proceedings-article","created":{"date-parts":[[2008,10,28]],"date-time":"2008-10-28T15:23:13Z","timestamp":1225207393000},"page":"161-172","source":"Crossref","is-referenced-by-count":24,"title":["Single-level integrity and confidentiality protection for distributed shared memory multiprocessors"],"prefix":"10.1109","author":[{"given":"Brian","family":"Rogers","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chenyu","family":"Yan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Siddhartha","family":"Chhabra","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Milos","family":"Prvulovic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yan","family":"Solihin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1145\/1152154.1152170"},{"key":"17","author":"mcgrew","year":"2004","journal-title":"The Galois\/Counter Mode of Operation (GCM)"},{"key":"18","article-title":"hp issues battle cry in high-end unix server market","author":"olavsrud","year":"2000","journal-title":"ServerWatch http \/\/www serverwatch com\/news\/article php\/139-9451"},{"key":"15","article-title":"architectural support for copy and tamper resistant software","author":"lie","year":"2000","journal-title":"Proc Int l Conf Architectural Support for Programming Languages and Operating Systems"},{"key":"16","year":"0"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.14"},{"key":"14","article-title":"specifying and verifying hardware for tamper-resistant software","author":"lie","year":"2003","journal-title":"IEEE Symposium on Security and Privacy"},{"key":"11","article-title":"global atm security alliance focuses on insider fraud","author":"lee","year":"0","journal-title":"ATMMarketplace http \/\/www atmmarketplace com\/article php?id=7154"},{"key":"12","doi-asserted-by":"crossref","DOI":"10.1109\/PACT.2007.4336203","article-title":"i2sems: interconnects-independent security enhanced shared memory multiprocessor systems","author":"lee","year":"2007","journal-title":"Proc Int l Conf Parallel Architectures and Compilation Techniques"},{"key":"21","first-page":"123","article-title":"architectural support for high speed protection of memory integrity and confidentiality in multiprocessor systems","author":"shi","year":"2004","journal-title":"Proceedings of the International Conference on Parallel Architectures and Compilation Techniques"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.11"},{"key":"22","doi-asserted-by":"crossref","DOI":"10.1145\/1080695.1069972","article-title":"high efficiency counter mode security architecture via prediction and precomputation","author":"shi","year":"2005","journal-title":"Proceedings of the 21st International Symposium on Computer Architecture"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1145\/1055626.1055629"},{"key":"24","year":"2004","journal-title":"SGI Altix 3000 Data Sheet"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253207"},{"key":"26","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/ISCA.1995.524546","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"27","doi-asserted-by":"crossref","DOI":"10.1145\/1150019.1136502","article-title":"improving cost, performance, and security of memory encryption and authentication","author":"yan","year":"2006","journal-title":"Proc Int l Symp Computer Architecture"},{"key":"28","article-title":"a high speed architecture for galois\/counter mode of operation (gcm)","author":"yang","year":"2005","journal-title":"Cryptology ePrint Archive Report 2005\/146"},{"key":"29","doi-asserted-by":"crossref","DOI":"10.1109\/MICRO.2003.1253209","article-title":"fast secure processor for inhibiting software piracy and tampering","author":"yang","year":"2003","journal-title":"the 26th Annual International Symposium on Microarchitecture"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2003.1183547"},{"key":"2","article-title":"checking the integrity of memory in a snooping-based symmetric multiprocessor (smp) system","author":"clarke","year":"2004","journal-title":"MIT CSAIL CSG-TR-470"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/12.729797"},{"key":"1","author":"bartholomew","year":"0","journal-title":"On Demand Computing - IT On Tap"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.31"},{"key":"7","year":"0","journal-title":"Enhanced Data Security to Consumer Electronics Products"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2002.1039525"},{"key":"5","author":"huang","year":"2003","journal-title":"Hacking the Xbox An Introduction to Reverse Engineering"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/EURMIC.1999.794507"},{"key":"9","article-title":"chiplock: support for secure microarchitectures","author":"kgil","year":"2004","journal-title":"Proceedings of the Workshop on Architectural Support for Security and Anti-Virus (WASSA)"},{"key":"8","year":"0"}],"event":{"name":"2008 IEEE 14th International Symposium on High Performance Computer Architecture (HPCA)","location":"Salt Lake City, UT, USA","start":{"date-parts":[[2008,2,16]]},"end":{"date-parts":[[2008,2,20]]}},"container-title":["2008 IEEE 14th International Symposium on High Performance Computer Architecture"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4653641\/4658618\/04658636.pdf?arnumber=4658636","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,20]],"date-time":"2023-05-20T18:33:59Z","timestamp":1684607639000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4658636\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,2]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/hpca.2008.4658636","relation":{},"ISSN":["1530-0897"],"issn-type":[{"value":"1530-0897","type":"print"}],"subject":[],"published":{"date-parts":[[2008,2]]}}}