{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T06:11:49Z","timestamp":1747807909102,"version":"3.28.0"},"reference-count":28,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,2]]},"DOI":"10.1109\/hpca.2009.4798263","type":"proceedings-article","created":{"date-parts":[[2009,3,10]],"date-time":"2009-03-10T09:52:31Z","timestamp":1236678751000},"page":"277-288","source":"Crossref","is-referenced-by-count":26,"title":["Reconciling specialization and flexibility through compound circuits"],"prefix":"10.1109","author":[{"given":"Sami","family":"Yehia","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sylvain","family":"Girbal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hugues","family":"Berry","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Olivier","family":"Temam","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1145\/1016720.1016726"},{"journal-title":"UTDSP Benchmark Suite","year":"1998","author":"lee","key":"17"},{"key":"18","doi-asserted-by":"crossref","first-page":"89","DOI":"10.1145\/1150019.1136494","article-title":"soda: a low-power architecture for software radio","author":"lin","year":"2006","journal-title":"Proceedings of the 20th annual International Symposium on Computer Architecture ISCA"},{"journal-title":"PowerPC 405 CPU Core","year":"2006","key":"15"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/325096.325162"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.33"},{"journal-title":"Evolutionary Computation A Unified Approach","year":"2006","author":"de jong","key":"14"},{"key":"11","first-page":"30","article-title":"application-specific processing on a generalpurpose core via transparent instruction set customization","author":"clark","year":"2004","journal-title":"Proc of the International Symposium on Microarchitecture"},{"key":"12","article-title":"optimode: programmable accelerator engines through retargetable customization","author":"clark","year":"2004","journal-title":"Proc of Hot Chips 16"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.850844"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168878"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1145\/871656.859667"},{"key":"23","doi-asserted-by":"crossref","first-page":"127","DOI":"10.1023\/A:1015341305426","article-title":"pico-npa: high-level synthesis of nonprogrammable hardware accelerators","volume":"31","author":"schreiber","year":"2002","journal-title":"J VLSI Signal Process Syst"},{"key":"24","first-page":"46","article-title":"high-level power modeling of cplds and fpgas. computer design, 2001. iccd 2001","author":"shang","year":"2001","journal-title":"Proceedings 2001 International Conference on"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1145\/349299.349317"},{"key":"26","first-page":"404","article-title":"progressive decomposition: a heuristic to structure arithmetic circuits","author":"verma","year":"2007","journal-title":"DAC '07 Proceedings of the 44th annual conference on Design automation"},{"key":"27","doi-asserted-by":"crossref","first-page":"238","DOI":"10.1145\/1028176.1006721","article-title":"from sequences of dependent instructions to functions: an approach for improving performance without ilp or speculation","author":"yehia","year":"2004","journal-title":"Proceedings 29th Annual International Symposium on Computer Architecture ISCA-02"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/SASP.2008.4570779"},{"year":"0","key":"3"},{"journal-title":"Tensilica","year":"0","key":"2"},{"key":"10","first-page":"141","article-title":"the reconfigurable streaming vector processor (rsvptm)","author":"ciricescu","year":"2003","journal-title":"MICRO 36 Proceedings of the 36th annual IEEE\/ACM International Symposium on Microarchitecture"},{"year":"0","key":"1"},{"key":"7","first-page":"395","article-title":"Area-efficient instruction set synthesis for reconfigurable system-on-chip designs","author":"brisk","year":"2004","journal-title":"Proceedings 41st Design Automation Conference 2004 DAC"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2007.12"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/SASP.2008.4570782"},{"year":"0","key":"4"},{"journal-title":"Application-specific architecture framework for high-performance low-power embedded computing","year":"2006","author":"cheng","key":"9"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/1024393.1024396"}],"event":{"name":"2009 IEEE 15th International Symposium on High Performance Computer Architecture (HPCA)","start":{"date-parts":[[2009,2,14]]},"location":"Raleigh, NC, USA","end":{"date-parts":[[2009,2,18]]}},"container-title":["2009 IEEE 15th International Symposium on High Performance Computer Architecture"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4795428\/4798227\/04798263.pdf?arnumber=4798263","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T13:33:29Z","timestamp":1497792809000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4798263\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,2]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/hpca.2009.4798263","relation":{},"subject":[],"published":{"date-parts":[[2009,2]]}}}