{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,2]],"date-time":"2026-10-02T08:10:56Z","timestamp":1790928656433,"version":"4.1.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,2]]},"DOI":"10.1109\/hpca.2011.5749745","type":"proceedings-article","created":{"date-parts":[[2011,4,18]],"date-time":"2011-04-18T13:49:44Z","timestamp":1303134584000},"page":"382-393","source":"Crossref","is-referenced-by-count":166,"title":["A quantitative performance analysis model for GPU architectures"],"prefix":"10.1109","author":[{"given":"Yao","family":"Zhang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"John D.","family":"Owens","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306801"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2008.05.011"},{"key":"ref12","article-title":"A cross-input adaptive framework for GPU program optimizations","author":"liu","year":"2009","journal-title":"Proceedings of the 2009 IEEE International Symposium on Parallel Distributed Processing (IPDPS '09"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1542275.1542313"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693471"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1375527.1375562"},{"key":"ref16","article-title":"Decuda and Cudasm, the cubin utilities package","author":"van der laan","year":"2009"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2008.5214359"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693472"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2010.61"},{"key":"ref4","article-title":"ATI Stream Profiler","year":"0"},{"key":"ref3","article-title":"General-purpose computation using graphics hardware","year":"0"},{"key":"ref6","article-title":"Barra, a parallel functional GPGPU simulator","author":"collange","year":"2009"},{"key":"ref5","article-title":"NVIDIA Parallel Nsight","year":"0"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693470"},{"key":"ref7","article-title":"Translating GPU binaries to tiered SIMD architectures with Ocelot","author":"diamos","year":"2009"},{"key":"ref2","article-title":"The OpenCL specification","year":"0"},{"key":"ref1","article-title":"NVIDIA CUDA compute unified device architecture, programming guide","year":"0"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555775"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1654059.1654078"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1362622.1362674"},{"key":"ref21","author":"rice","year":"1984","journal-title":"Solving Elliptic Problems Using ELLPACK"}],"event":{"name":"2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA)","location":"San Antonio, TX, USA","start":{"date-parts":[[2011,2,12]]},"end":{"date-parts":[[2011,2,16]]}},"container-title":["2011 IEEE 17th International Symposium on High Performance Computer Architecture"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5743111\/5749710\/05749745.pdf?arnumber=5749745","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T11:56:14Z","timestamp":1490097374000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5749745\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,2]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/hpca.2011.5749745","relation":{},"subject":[],"published":{"date-parts":[[2011,2]]}}}