{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,2]],"date-time":"2026-01-02T07:30:15Z","timestamp":1767339015074,"version":"3.41.0"},"reference-count":50,"publisher":"IEEE","license":[{"start":{"date-parts":[[2012,2,1]],"date-time":"2012-02-01T00:00:00Z","timestamp":1328054400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2012,2,1]],"date-time":"2012-02-01T00:00:00Z","timestamp":1328054400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,2]]},"DOI":"10.1109\/hpca.2012.6169049","type":"proceedings-article","created":{"date-parts":[[2012,3,26]],"date-time":"2012-03-26T21:53:22Z","timestamp":1332798802000},"page":"1-12","source":"Crossref","is-referenced-by-count":63,"title":["Whole packet forwarding: Efficient design of fully adaptive routing algorithms for networks-on-chip"],"prefix":"10.1109","author":[{"given":"Sheng","family":"Ma","sequence":"first","affiliation":[{"name":"School of Computer, National University of Defense Technology, Changsha, China"}]},{"given":"Natalie Enright","family":"Jerger","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada"}]},{"given":"Zhiying","family":"Wang","sequence":"additional","affiliation":[{"name":"School of Computer, National University of Defense Technology, Changsha, China"}]}],"member":"263","reference":[{"journal-title":"ISCA 1995","article-title":"An efficient, fully adaptive deadlock recovery scheme: Disha","author":"Pinkston","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1654059.1654112"},{"journal-title":"PACT 2008","key":"ref3","article-title":"The parsec benchmark suite: characterization and architectural implications"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/71.877831"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/71.127260"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.1676939"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2001.935594"},{"volume-title":"Principles and Practices of Interconnection Networks","year":"2003","author":"Dally","key":"ref8"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/BF01660031"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798252"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658641"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/71.250114"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/71.473515"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/71.532115"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/71.970556"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-01725-4"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749724"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/71.707539"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2024723.2000096"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/185675.185682"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658640"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378782"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669144"},{"journal-title":"DAC 2004","article-title":"DyAD - smart routing for networks-on-chip","author":"Hu","key":"ref24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/micro.2008.4771804"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1016\/0376-5075(79)90032-1"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/dac.2005.193873"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/dac.2006.229242"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/71.395404"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2007.375137"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/2024723.2000113"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2010691"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/1105734.1105747"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/HIS.2001.946702"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2004.1310774"},{"journal-title":"Poster presented at ASPLOS 2008","article-title":"FeS2: A full-system execution-driven simulator for x86","author":"Neelakantam","key":"ref37"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.50"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/1084834.1084856"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2001.903268"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1006\/jpdc.1996.0008"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/12.506424"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/isca.2003.1207000"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1147\/sj.342.0185"},{"journal-title":"ISCA 1988","article-title":"High-performance multiqueue buffers for VLSI communication switches","author":"Tamir","key":"ref45"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/71.910875"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2011.16"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2011.60"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378780"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416640"}],"event":{"name":"2012 IEEE 18th International Symposium on High Performance Computer Architecture (HPCA)","start":{"date-parts":[[2012,2,25]]},"location":"New Orleans, LA, USA","end":{"date-parts":[[2012,2,29]]}},"container-title":["IEEE International Symposium on High-Performance Comp Architecture"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6165554\/6168936\/06169049.pdf?arnumber=6169049","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T05:50:57Z","timestamp":1747806657000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6169049\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,2]]},"references-count":50,"URL":"https:\/\/doi.org\/10.1109\/hpca.2012.6169049","relation":{},"subject":[],"published":{"date-parts":[[2012,2]]}}}