{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,26]],"date-time":"2026-02-26T15:44:54Z","timestamp":1772120694370,"version":"3.50.1"},"reference-count":30,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,2]]},"DOI":"10.1109\/hpca.2013.6522326","type":"proceedings-article","created":{"date-parts":[[2013,6,8]],"date-time":"2013-06-08T11:12:52Z","timestamp":1370689972000},"page":"282-293","source":"Crossref","is-referenced-by-count":49,"title":["Accelerating write by exploiting PCM asymmetries"],"prefix":"10.1109","author":[{"family":"Jianhui Yue","sequence":"first","affiliation":[]},{"family":"Yifeng Zhu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2004.1346644"},{"key":"17","first-page":"70","article-title":"A 5.2ghz microprocessor chip for the ibm zenterprisesystem","author":"warnock","year":"2011","journal-title":"IEEE International SolidState Cireuits Conferenee 201 1 ISSCC 201 1 Digest of Teehnieal Papers"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2004.1419329"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.908001"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.38"},{"key":"13","doi-asserted-by":"crossref","first-page":"210","DOI":"10.1109\/JSSC.2006.888349","article-title":"A O.i-\/.lm 1.8-v 256-mb phase-change random access memory (pram) with 66-mhz synchronous burstread operation","volume":"42","author":"kang","year":"2007","journal-title":"Solid-State Circuits IEEE Journal of"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373500"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749752"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669157"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696081"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859016"},{"key":"22","first-page":"363","article-title":"Understanding the energy consumption of dynamic random access memories","author":"sang","year":"2010","journal-title":"Proceedings of the 42nd Annual IEEEIACM International Symposium on Microarchiteeture"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.82"},{"key":"24","doi-asserted-by":"crossref","first-page":"100","DOI":"10.1145\/1105734.1105748","article-title":"DRAMsim: A memory system simulator","volume":"33","author":"wang","year":"2005","journal-title":"SIGARCH Comput Archit News"},{"key":"25","first-page":"1","article-title":"Lmproving read performance of phase change memories via write cancellation and write pausing","author":"moinuddin","year":"2010","journal-title":"Proceedings of the 1 6th International Conference on HighPerformance Computer Arehitecture"},{"key":"26","article-title":"MLP yes! ILP no! in Wild and Crazy ldeas Session","author":"glew","year":"1998","journal-title":"Proc 7th Int Conf Architectural Support for Programming Languages and Operating Systems"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.7"},{"key":"28","first-page":"201","article-title":"Lmproving write operations in mlc phase change memory","author":"jiang","year":"2012","journal-title":"Proeeedings of the 18th International Conference on High-Petformance Computer Architecture"},{"key":"29","first-page":"380","article-title":"PreSET: Improving performance of phase change memories by exploiting asymmetry in write times","author":"qureshi","year":"2012","journal-title":"Proeeedings of the 36th Annual International Symposium on Computer Arehiteeture"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"2","year":"0"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.46"},{"key":"1","author":"bergman","year":"2008","journal-title":"ExaScale Computing Study Technology Challenges in Achieving Exascale Systems Peter Kogge"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155642"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555759"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.16"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.108"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815980"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736023"}],"event":{"name":"2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)","location":"Shenzhen","start":{"date-parts":[[2013,2,23]]},"end":{"date-parts":[[2013,2,27]]}},"container-title":["2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6518038\/6522298\/06522326.pdf?arnumber=6522326","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T10:21:45Z","timestamp":1498040505000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6522326\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,2]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/hpca.2013.6522326","relation":{},"subject":[],"published":{"date-parts":[[2013,2]]}}}