{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,13]],"date-time":"2026-05-13T00:10:09Z","timestamp":1778631009925,"version":"3.51.4"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,2]]},"DOI":"10.1109\/hpca.2014.6835935","type":"proceedings-article","created":{"date-parts":[[2014,7,28]],"date-time":"2014-07-28T18:48:01Z","timestamp":1406573281000},"page":"237-247","source":"Crossref","is-referenced-by-count":28,"title":["STM: Cloning the spatial and temporal memory access behavior"],"prefix":"10.1109","author":[{"given":"Amro","family":"Awad","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yan","family":"Solihin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2010.5650208"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1145\/360860.360863"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1145\/1353535.1346307"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1990.134547"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1147\/sj.92.0078"},{"key":"13","first-page":"1","article-title":"The return of synthetic benchmarks","author":"joshi","year":"2008","journal-title":"2008 SPEC Benchmark Workshop"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658642"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/12.40842"},{"key":"12","first-page":"105","article-title":"Performance cloning: A technique for disseminating proprietary applications as benchmarks","author":"joshi","year":"2007","journal-title":"Proc of International Symposium on Workload Characterization (IISWC)"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088164"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1145\/358274.358283"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6169042"},{"key":"1","year":"0"},{"key":"10","first-page":"1","article-title":"Automatic generation of miniaturized synthetic proxies for target applications to efficiently design multicore processors","volume":"99","author":"ganesan","year":"2013","journal-title":"IEEE Transactions on Computers"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2000.842273"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1093\/comjnl\/19.1.43"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1093\/comjnl\/19.1.43"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"9","first-page":"33","article-title":"Synthesizing memory-level parallelism aware miniature clones for spec cpu2006 and implantbench workloads","author":"ganesan","year":"2010","journal-title":"Proc IEEE Int Symp Perform Anal Syst Softw (ISPASS)"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/800264.809309"}],"event":{"name":"2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)","location":"Orlando, FL, USA","start":{"date-parts":[[2014,2,15]]},"end":{"date-parts":[[2014,2,19]]}},"container-title":["2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6823235\/6835920\/06835935.pdf?arnumber=6835935","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T20:23:35Z","timestamp":1490300615000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6835935\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,2]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/hpca.2014.6835935","relation":{},"subject":[],"published":{"date-parts":[[2014,2]]}}}