{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T10:16:05Z","timestamp":1729678565600,"version":"3.28.0"},"reference-count":31,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,2]]},"DOI":"10.1109\/hpca.2014.6835949","type":"proceedings-article","created":{"date-parts":[[2014,7,28]],"date-time":"2014-07-28T18:48:01Z","timestamp":1406573281000},"page":"392-403","source":"Crossref","is-referenced-by-count":15,"title":["PVCoherence: Designing flat coherence protocols for scalable verification"],"prefix":"10.1109","author":[{"given":"Meng","family":"Zhang","sequence":"first","affiliation":[]},{"given":"Jesse D.","family":"Bingham","sequence":"additional","affiliation":[]},{"given":"John","family":"Erickson","sequence":"additional","affiliation":[]},{"given":"Daniel J.","family":"Sorin","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.17"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.58"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1145\/859639.859640"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1016\/0020-0190(86)90071-2"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378536"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-70545-1_4"},{"key":"14","article-title":"Parametrized system verification with guard strengthening and parameter abstraction","author":"krstic","year":"2005","journal-title":"Automated Verification of Infinite State Systems"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1992.276232"},{"key":"12","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-540-39724-3_22","article-title":"Exact and efficient verification of parameterized cache coherence protocols","author":"emerson","year":"2003","journal-title":"Correct Hardware Design and Verification Methods"},{"key":"21","article-title":"Parameterized verification of the flash cache coherence protocol by compositional model checking","volume":"2144","author":"mcmillan","year":"2001","journal-title":"CHARME 01 IFIP Working Conference on Correct Hardware Design and Verification Methods Lecture Notes in Computer Science"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835967"},{"key":"22","doi-asserted-by":"crossref","DOI":"10.1007\/3-540-48153-2_17","article-title":"Verification of infinite state systems by compositional model checking","author":"mcmillan","year":"1999","journal-title":"Proc of the 10th IFIP WG 10 5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1007\/BF00625968"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/FMCAD.2009.5351126"},{"journal-title":"P JN Cacti 5 1 Technical Report HPL-2008-20","year":"0","author":"shyamkumar","key":"25"},{"key":"26","article-title":"Inside intel next generation nehalem microarchitecture","volume":"20","author":"singhal","year":"2008","journal-title":"Hot Chips"},{"key":"27","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-031-01733-9","author":"sorin","year":"2011","journal-title":"A Primer on Memory Consistency and Cache Coherence Synthesis Lectures on Computer Architecture"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/FMCAD.2008.ECP.14"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749723"},{"key":"3","doi-asserted-by":"crossref","DOI":"10.1007\/3-540-47813-2_22","article-title":"Parameterized verification of a cache coherence protocol: Safety and liveness","volume":"2294","author":"baukus","year":"2002","journal-title":"Verification Model Checking and Abstract Interpretation"},{"key":"2","article-title":"Variability in architectural simulations of multi-threaded workloads","author":"alameldeen","year":"2003","journal-title":"Proc 9th Int l Symp High-Performance Computer Architecture"},{"key":"10","doi-asserted-by":"crossref","DOI":"10.1007\/3-540-48683-6_16","article-title":"Experience with predicate abstraction","author":"das","year":"1999","journal-title":"Computer Aided Verification"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1988.5238"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1145\/2541940.2541982"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155647"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.11"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522350"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.31"},{"key":"8","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-540-30494-4_27","article-title":"A simple method for parameterized verification of cache coherence protocols","author":"chou","year":"2004","journal-title":"Formal Methods in Computer-Aided Design"}],"event":{"name":"2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)","start":{"date-parts":[[2014,2,15]]},"location":"Orlando, FL, USA","end":{"date-parts":[[2014,2,19]]}},"container-title":["2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6823235\/6835920\/06835949.pdf?arnumber=6835949","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,15]],"date-time":"2023-07-15T14:50:19Z","timestamp":1689432619000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6835949\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,2]]},"references-count":31,"URL":"https:\/\/doi.org\/10.1109\/hpca.2014.6835949","relation":{},"subject":[],"published":{"date-parts":[[2014,2]]}}}