{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,8]],"date-time":"2026-01-08T03:32:33Z","timestamp":1767843153612,"version":"3.49.0"},"reference-count":34,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,2]]},"DOI":"10.1109\/hpca.2014.6835963","type":"proceedings-article","created":{"date-parts":[[2014,7,28]],"date-time":"2014-07-28T14:48:01Z","timestamp":1406558881000},"page":"546-557","source":"Crossref","is-referenced-by-count":15,"title":["GPUdmm: A high-performance and memory-oblivious GPU architecture using dynamic memory management"],"prefix":"10.1109","author":[{"given":"Youngsok","family":"Kim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaewon","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jae-Eon","family":"Jo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jangwoo","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522332"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2013.19"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155673"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.24"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416642"},{"key":"34","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2007.4601880"},{"key":"16","author":"kanter","year":"2009","journal-title":"Inside Fermi Nvidia's HPC Push"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1145\/1993498.1993516"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2013.6618823"},{"key":"11","year":"0"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/2259016.2259038"},{"key":"21","year":"0"},{"key":"20","year":"0"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1145\/2370816.2370824"},{"key":"23","article-title":"Fundamental latency tradeoffs in architecting DRAM caches","author":"qureshi","year":"2012","journal-title":"Micro"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.16"},{"key":"25","author":"rupp","year":"0","journal-title":"CPU GPU and MIC Hardware Characteristics over Time"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1145\/1345206.1345220"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/HIPC.2009.5433185"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1145\/2451116.2451169"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2010.69"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"2","author":"anderson","year":"2004","journal-title":"PCI express system architecture"},{"key":"10","article-title":"Where is the data? Why you cannot debate CPU vs","author":"gregg","year":"2011","journal-title":"GPU Performance Without the Answer in ISPASS"},{"key":"1","year":"0"},{"key":"30","article-title":"GPU-to-CPU callbacks","author":"stuart","year":"2010","journal-title":"UCHPC"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155655"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.30"},{"key":"32","author":"lecroy","year":"0","journal-title":"PCI Express Protocol Solutions for Testing and Compliance"},{"key":"5","article-title":"Accelerating braided b+ tree searches on a GPU with CUDA","author":"fix","year":"2011","journal-title":"A4MMC"},{"key":"31","article-title":"A framework for efficient and scalable execution of domainspecific templates on GPUs","author":"sundaram","year":"2009","journal-title":"IPDPS"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"9","author":"goldhammer","year":"2008","journal-title":"Understanding Performance of PCI Express Systems"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736059"}],"event":{"name":"2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)","location":"Orlando, FL, USA","start":{"date-parts":[[2014,2,15]]},"end":{"date-parts":[[2014,2,19]]}},"container-title":["2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6823235\/6835920\/06835963.pdf?arnumber=6835963","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T16:06:09Z","timestamp":1490285169000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6835963\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,2]]},"references-count":34,"URL":"https:\/\/doi.org\/10.1109\/hpca.2014.6835963","relation":{},"subject":[],"published":{"date-parts":[[2014,2]]}}}