{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:34:51Z","timestamp":1772724891557,"version":"3.50.1"},"reference-count":39,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,3]]},"DOI":"10.1109\/hpca.2016.7446061","type":"proceedings-article","created":{"date-parts":[[2016,4,4]],"date-time":"2016-04-04T18:03:56Z","timestamp":1459793036000},"page":"151-162","source":"Crossref","is-referenced-by-count":23,"title":["Core tunneling: Variation-aware voltage noise mitigation in GPUs"],"prefix":"10.1109","author":[{"given":"Renji","family":"Thomas","sequence":"first","affiliation":[]},{"given":"Kristin","family":"Barber","sequence":"additional","affiliation":[]},{"given":"Naser","family":"Sedaghati","sequence":"additional","affiliation":[]},{"given":"Li","family":"Zhou","sequence":"additional","affiliation":[]},{"given":"Radu","family":"Teodorescu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.28"},{"key":"ref38","article-title":"CACTI 6.0: A Tool to Model Large Caches","author":"muralimanohar","year":"2009","journal-title":"HP Labs Tech Rep HPL- 2009-85"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/6040.784471"},{"key":"ref32","doi-asserted-by":"crossref","first-page":"82","DOI":"10.1109\/ISLPED.2013.6629271","article-title":"Characterizing and evaluating voltage noise in multi-core near-threshold processors","author":"zhang","year":"2013","journal-title":"Proc Int Symp Low-Power Electronics Design"},{"key":"ref31","article-title":"Voltage regulator module (VRM) and enterprise voltage regulator-down (EVRD) 11.1 design guidelines","year":"2009","journal-title":"Tech Rep Intel Corp"},{"key":"ref30","article-title":"Intel Core ™ i7 Processor","year":"0"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.16"},{"key":"ref35","article-title":"NVIDIA's Fermi: The first complete GPU computing architecture","author":"glaskowsky","year":"0","journal-title":"White Paper"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379023"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871562"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798233"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337188"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2627369.2627605"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.37"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.52"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250703"},{"key":"ref17","article-title":"The impact of systematic process variations on symmetrical performance in chip multi-processors","author":"humenay","year":"2007","journal-title":"Design Automation and Test in Europe (DATE)"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2006.4271854"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.43"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830811"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.12"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056030"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1283780.1283808"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859902"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364663"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090651"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658654"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.35"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2003.1183526"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373412"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.40"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669168"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"1","DOI":"10.7873\/DATE2014.189","article-title":"Process variation-aware workload partitioning algorithms for GPUs supporting spatial-multitasking","author":"aguilera","year":"2014","journal-title":"Design Automation and Test in Europe (DATE)"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485964"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155622"},{"key":"ref25","doi-asserted-by":"crossref","first-page":"3","DOI":"10.1109\/TSM.2007.913186","article-title":"VARIUS: A Model of Parameter Variation and Resulting Timing Errors for Microarchitects","volume":"21","author":"sarangi","year":"2008","journal-title":"IEEE Transactions on Semiconductor Manufacturing"}],"event":{"name":"2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)","location":"Barcelona, Spain","start":{"date-parts":[[2016,3,12]]},"end":{"date-parts":[[2016,3,16]]}},"container-title":["2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7440961\/7446041\/7446061.pdf?arnumber=7446061","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T06:05:40Z","timestamp":1498284340000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7446061\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,3]]},"references-count":39,"URL":"https:\/\/doi.org\/10.1109\/hpca.2016.7446061","relation":{},"subject":[],"published":{"date-parts":[[2016,3]]}}}