{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T22:59:51Z","timestamp":1729637991801,"version":"3.28.0"},"reference-count":55,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,3]]},"DOI":"10.1109\/hpca.2016.7446066","type":"proceedings-article","created":{"date-parts":[[2016,4,4]],"date-time":"2016-04-04T22:03:56Z","timestamp":1459807436000},"page":"212-224","source":"Crossref","is-referenced-by-count":10,"title":["Revisiting virtual L1 caches: A practical design using dynamic synonym remapping"],"prefix":"10.1109","author":[{"given":"Hongil","family":"Yoon","sequence":"first","affiliation":[]},{"given":"Gurindar S.","family":"Sohi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024954"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"journal-title":"SPECjbb","year":"2005","key":"ref33"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1409360.1409380"},{"journal-title":"TPC-H","year":"0","key":"ref31"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/214451.214455"},{"journal-title":"Geekbench","year":"0","key":"ref37"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/1186736.1186737"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/2150976.2150982"},{"journal-title":"Memcached","year":"0","key":"ref34"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/125826.125932"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1999.765941"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1994.288164"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237026"},{"key":"ref1","article-title":"Race to Exascale: Opportunities and Challenges","author":"sodani","year":"0","journal-title":"MICRO 2011 Keynote talk"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/2.546611"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1989.714548"},{"key":"ref21","first-page":"243","article-title":"U-cache: A Cost-effective Solution to Synonym Problem","author":"kim","year":"1995","journal-title":"Proceedings of the 1st IEEE symposium on High Performance Computer Architecture"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1810085.1810109"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/17356.17398"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2011.65"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/362686.362692"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1145\/195792.195795"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1145\/141936.141969"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1145\/1176760.1176783"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540714"},{"key":"ref53","doi-asserted-by":"crossref","first-page":"133","DOI":"10.1145\/2678373.2665694","article-title":"The Direct-to-Data (D2D) Cache: Navigating the Cache Hierarchy with a Single Lookup","author":"sembrant","year":"2014","journal-title":"Proc Annu Int Symp Computer Architecture (ISCA)"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1145\/143365.143508"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.882599"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176249"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/1065010.1065034"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871583"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/40.491460"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/40.621215"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/36205.36186"},{"key":"ref16","doi-asserted-by":"crossref","first-page":"1585","DOI":"10.1109\/TC.2008.108","article-title":"The Synonym Lookaside Buffer: A Solution to the Synonym Problem in Virtual Caches","volume":"57","author":"qiu","year":"2008","journal-title":"IEEE Trans Comput"},{"year":"0","key":"ref17","article-title":"Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, Part 1, Chapter 2"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/40.710872"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485968"},{"journal-title":"Computer Organization and Design The Hardware\/Software Interface","year":"2007","author":"patterson","key":"ref4"},{"key":"ref3","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-031-01724-7","author":"jacob","year":"2009","journal-title":"The Memory System You Can'T Avoid It You Can'T Ignore It You Can'T Fake It Morgan and Claypool Publishers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1077603.1077688"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2002.1029612"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/12.926161"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2002.1"},{"journal-title":"Memory Systems Cache DRAM Disk","year":"2007","author":"jacob","key":"ref49"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"196","DOI":"10.1145\/263272.263332","article-title":"Reducing TLB power requirements","author":"juan","year":"1997","journal-title":"Proceedings of 1997 International Symposium on Low Power Electronics and Design LPE"},{"journal-title":"ARM","article-title":"Migrating a Software Application from ARMv5 to ARMv7-A\/R Application Note 425","year":"0","key":"ref46"},{"key":"ref45","article-title":"The Interaction of Virtual Memory and Cache Memory","author":"lynch","year":"1993","journal-title":"Stanford University Technical Report no CSL-TR-93&#x2013;579"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/40.641599"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/48012.48037"},{"journal-title":"ARM","article-title":"ARM Cortex-A72 MPCore Processor Technical Reference Manual","year":"0","key":"ref42"},{"key":"ref41","article-title":"CACTI 6.0: A tool to model large caches","author":"muralimanohar","year":"2009","journal-title":"HP Laboratories"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749717"},{"key":"ref43","article-title":"Computer Architecture","author":"hennessy","year":"2006","journal-title":"A Quantitative Approach"}],"event":{"name":"2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)","start":{"date-parts":[[2016,3,12]]},"location":"Barcelona, Spain","end":{"date-parts":[[2016,3,16]]}},"container-title":["2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7440961\/7446041\/7446066.pdf?arnumber=7446066","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,17]],"date-time":"2022-06-17T01:49:28Z","timestamp":1655430568000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7446066\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,3]]},"references-count":55,"URL":"https:\/\/doi.org\/10.1109\/hpca.2016.7446066","relation":{},"subject":[],"published":{"date-parts":[[2016,3]]}}}