{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T07:14:00Z","timestamp":1772694840888,"version":"3.50.1"},"reference-count":77,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,1,31]],"date-time":"2026-01-31T00:00:00Z","timestamp":1769817600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,31]],"date-time":"2026-01-31T00:00:00Z","timestamp":1769817600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100018537","name":"National Science and Technology Major Project","doi-asserted-by":"publisher","award":["2022ZD0115200"],"award-info":[{"award-number":["2022ZD0115200"]}],"id":[{"id":"10.13039\/501100018537","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"NSFC","doi-asserted-by":"publisher","award":["62502255,62125403,U24B20164,U24A20234,92464302"],"award-info":[{"award-number":["62502255,62125403,U24B20164,U24A20234,92464302"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100017582","name":"Beijing National Research Center for Information Science and Technology","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100017582","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,1,31]]},"DOI":"10.1109\/hpca68181.2026.11408476","type":"proceedings-article","created":{"date-parts":[[2026,3,4]],"date-time":"2026-03-04T20:47:22Z","timestamp":1772657242000},"page":"1-15","source":"Crossref","is-referenced-by-count":0,"title":["ReThermal: Co-Design of Thermal-Aware Static and Dynamic Scheduling for LLM Training on Liquid-Cooled Wafer-Scale Chips"],"prefix":"10.1109","author":[{"given":"Chengran","family":"Li","sequence":"first","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Huizheng","family":"Wang","sequence":"additional","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiaxin","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jingyao","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhiheng","family":"Yue","sequence":"additional","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xia","family":"Li","sequence":"additional","affiliation":[{"name":"Shanghai Artificial Intelligence Laboratory,Shanghai,China,200433"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shenfei","family":"Jiang","sequence":"additional","affiliation":[{"name":"Shanghai Artificial Intelligence Laboratory,Shanghai,China,200433"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jinyi","family":"Deng","sequence":"additional","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yang","family":"Hu","sequence":"additional","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shouyi","family":"Yin","sequence":"additional","affiliation":[{"name":"School of Integrated circuits, Tsinghua University,BNRist,Beijing,China,100084"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/THETA.2010.5766383"},{"key":"ref2","article-title":"Gpt-4 technical report","author":"Achiam","year":"2023","journal-title":"arXiv preprint"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ITHERM.2018.8419528"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-30154-4_6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080231"},{"key":"ref6","volume-title":"Wafer-scale integration of semiconductor memory","author":"Aubusson","year":"1979"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.14778\/2732286.2732292"},{"key":"ref8","first-page":"1877","article-title":"Language models are few-shot learners","volume":"33","author":"Brown","year":"2020","journal-title":"Advances in neural information processing systems"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.882043"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1986.13689"},{"key":"ref11","article-title":"The survey of chiplet-based integrated architecture: An eda perspective","author":"Chen","year":"2024","journal-title":"arXiv preprint"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA59077.2024.00025"},{"key":"ref13","article-title":"Training deep nets with sublinear memory cost","author":"Chen","year":"2016","journal-title":"arXiv preprint"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2017.7998198"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC32696.2021.00033"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2023.3256796"},{"issue":"240","key":"ref17","first-page":"1","article-title":"Palm: Scaling language modeling with pathways","volume":"24","author":"Chowdhery","year":"2023","journal-title":"Journal of Machine Learning Research"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3643915.3644090"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC32862.2020.00013"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1016\/j.applthermaleng.2022.119370"},{"key":"ref21","first-page":"7480","article-title":"Scaling vision transformers to 22 billion parameters","volume-title":"International Conference on Machine Learning","author":"Dehghani","year":"2023"},{"key":"ref22","article-title":"Bert: Pre-training of deep bidirectional transformers for language understanding","author":"Devlin","year":"2018","journal-title":"arXiv preprint"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1080\/03091902.2024.2342196"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/s42001-024-00250-1"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/s12599-023-00834-7"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1016\/j.applthermaleng.2024.124692"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/iTherm54085.2022.9899649"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2024.3349669"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.48550\/arxiv.1811.06965"},{"key":"ref30","volume-title":"International Roadmap for Devices and Systems - 2023 Edition","year":"2023"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2019.2940427"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2018.00197"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3762655"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1080\/01457630490519772"},{"key":"ref35","article-title":"Scaling laws for neural language models","author":"Kaplan","year":"2020","journal-title":"arXiv preprint"},{"key":"ref36","first-page":"341","article-title":"Reducing activation recomputation in large transformer models","volume-title":"Proceedings of Machine Learning and Systems","volume":"5","author":"Korthikanti","year":"2023"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2021.3112025"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/tc.1985.1676584"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.4269\/ajtmh.16-0427"},{"issue":"06","key":"ref40","first-page":"993","article-title":"Research on wafer-scale chip mapping task based on genetic algorithm","volume":"46","author":"Li","year":"2024","journal-title":"Computer Engineering & Science"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1016\/j.applthermaleng.2023.121758"},{"key":"ref42","doi-asserted-by":"crossref","first-page":"469","DOI":"10.1145\/1669112.1669172","article-title":"Mcpat: An integrated power, area, and timing modeling framework for multicore and manycore architectures","volume-title":"Proceedings of the 42nd annual ieee\/acm international symposium on microarchitecture","author":"Li","year":"2009"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/3663408.3663409"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2021.3058201"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-96-5856-5_23"},{"key":"ref46","article-title":"Energy conscious dynamic window scheduling of chip multiprocessors","author":"Michel","year":"2022","journal-title":"arXiv preprint"},{"issue":"2018","key":"ref47","first-page":"32","article-title":"Introduction to comsol multiphysics\u00ae","volume-title":"COMSOL Multiphysics","volume":"9","year":"1998"},{"key":"ref48","first-page":"28","article-title":"Cacti 6.0: A tool to model large caches","volume":"27","author":"Muralimanohar","year":"2009","journal-title":"HP laboratories"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1145\/3341301.3359646"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1145\/3458817.3476209"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1115\/IMECE2015-51999"},{"issue":"11","key":"ref52","first-page":"57","article-title":"Thermal simulations of an electronic system using ansys icepak","volume":"5","author":"Raja","year":"2015","journal-title":"Intern. Journal of Engineering Research and Applications"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1016\/j.ymssp.2021.107614"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/SC41405.2020.00062"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2021.3060483"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1002\/adma.202109796"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/STHERM.2011.5767204"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358302"},{"key":"ref59","article-title":"Megatron-1m: Training multi-billion parameter language models using model parallelism","author":"Shoeybi","year":"2019","journal-title":"arXiv preprint"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1145\/3676641.3716025"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2761740"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2023.3258906"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/HCS55958.2022.9895534"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2017.29"},{"key":"ref65","article-title":"Llama 2: Open foundation and fine-tuned chat models","author":"Touvron","year":"2023","journal-title":"arXiv preprint"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.23919\/ICS.2024.3515003"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1016\/j.applthermaleng.2023.122178"},{"key":"ref68","first-page":"386","article-title":"Spatial-aware orchestration of 11 m attention on waferscale chips","volume-title":"International Symposium on Advanced Parallel Processing Technologies","author":"Wei","year":"2025"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1115\/1.2754781"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1016\/j.applthermaleng.2025.125459"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1145\/3695053.3731101"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-95-1021-4_3"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1145\/3695053.3731045"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1145\/3695053.3731016"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3079166"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/EPTC.2003.1271593"},{"key":"ref77","article-title":"Opt: Open pre-trained transformer language models","author":"Zhang","year":"2022","journal-title":"arXiv preprint"}],"event":{"name":"2026 IEEE International Symposium on High Performance Computer Architecture (HPCA)","location":"Sydney, Australia","start":{"date-parts":[[2026,1,31]]},"end":{"date-parts":[[2026,2,4]]}},"container-title":["2026 IEEE International Symposium on High Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11408404\/11408433\/11408476.pdf?arnumber=11408476","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T06:35:12Z","timestamp":1772692512000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11408476\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1,31]]},"references-count":77,"URL":"https:\/\/doi.org\/10.1109\/hpca68181.2026.11408476","relation":{},"subject":[],"published":{"date-parts":[[2026,1,31]]}}}