{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,29]],"date-time":"2026-03-29T16:11:49Z","timestamp":1774800709321,"version":"3.50.1"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,6]]},"DOI":"10.1109\/hpcs.2010.5547092","type":"proceedings-article","created":{"date-parts":[[2010,8,18]],"date-time":"2010-08-18T14:21:20Z","timestamp":1282141280000},"page":"459-466","source":"Crossref","is-referenced-by-count":8,"title":["Scalable instruction set simulator for thousand-core architectures running on GPGPUs"],"prefix":"10.1109","author":[{"given":"Shivani","family":"Raghav","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Martino","family":"Ruggiero","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Atienza","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christian","family":"Pinto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andrea","family":"Marongiu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Benini","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.31"},{"key":"ref11","article-title":"Wisconsin wind tunnel ii: A fast and portable parallel architecture simulator","author":"mukherjee","year":"1997"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/WSC.1998.745023"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/166955.166979"},{"key":"ref14","article-title":"SESC simulator","author":"renau","year":"2005"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/88.473612"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.82"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1562764.1562783"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.136"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/WSC.1994.717527"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"822","DOI":"10.1145\/1391469.1391679","article-title":"towards acceleration of fault simulation using graphics processing units","author":"gulati","year":"2008","journal-title":"2008 45th ACM\/IEEE Design Automation Conference DAC"},{"key":"ref7","article-title":"A distributed memory lapse: Parallel simulation of message-passing programs","author":"dickens","year":"1993","journal-title":"Workshop on Parallel and Distributed Simulation"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"52","DOI":"10.1145\/1496909.1496921","article-title":"Cotson infrastructure for full system simulation","volume":"43","author":"argollo","year":"2009","journal-title":"Operating Systems Rev"},{"key":"ref1","year":"0"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISPA.2009.51"}],"event":{"name":"Simulation (HPCS 2010)","location":"Caen","start":{"date-parts":[[2010,6,28]]},"end":{"date-parts":[[2010,7,2]]}},"container-title":["2010 International Conference on High Performance Computing &amp; Simulation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5538704\/5547051\/05547092.pdf?arnumber=5547092","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T08:49:50Z","timestamp":1497862190000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5547092\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/hpcs.2010.5547092","relation":{},"subject":[],"published":{"date-parts":[[2010,6]]}}}