{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T15:44:25Z","timestamp":1729611865314,"version":"3.28.0"},"reference-count":2,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,6]]},"DOI":"10.1109\/hpcs.2010.5547132","type":"proceedings-article","created":{"date-parts":[[2010,8,18]],"date-time":"2010-08-18T14:21:20Z","timestamp":1282141280000},"page":"188-188","source":"Crossref","is-referenced-by-count":0,"title":["The MANy JAva Core processor (MANJAC)"],"prefix":"10.1109","author":[{"given":"S","family":"Uhrig","sequence":"first","affiliation":[]}],"member":"263","reference":[{"key":"ref2","article-title":"A Flexible Java-on-Chip Solution","volume":"50 5","author":"uhrig","year":"2008","journal-title":"it - Information Technology"},{"key":"ref1","doi-asserted-by":"crossref","DOI":"10.1145\/1496909.1496921","article-title":"COTSon: infrastructure for full system simulation","volume":"43","author":"argollo","year":"2009","journal-title":"ACM SIGOPS Oper Syst Rev"}],"event":{"name":"Simulation (HPCS 2010)","start":{"date-parts":[[2010,6,28]]},"location":"Caen","end":{"date-parts":[[2010,7,2]]}},"container-title":["2010 International Conference on High Performance Computing & Simulation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5538704\/5547051\/05547132.pdf?arnumber=5547132","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T08:49:49Z","timestamp":1497862189000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5547132\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6]]},"references-count":2,"URL":"https:\/\/doi.org\/10.1109\/hpcs.2010.5547132","relation":{},"subject":[],"published":{"date-parts":[[2010,6]]}}}