{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,3]],"date-time":"2025-05-03T14:45:18Z","timestamp":1746283518888,"version":"3.28.0"},"reference-count":25,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/hpcs48598.2019.9188158","type":"proceedings-article","created":{"date-parts":[[2020,9,9]],"date-time":"2020-09-09T16:58:33Z","timestamp":1599670713000},"page":"612-619","source":"Crossref","is-referenced-by-count":3,"title":["A Novel FPGA-Based High Throughput Accelerator For Binary Search Trees"],"prefix":"10.1109","author":[{"given":"Oyku","family":"Melikoglu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Oguz","family":"Ergin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Behzad","family":"Salami","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Julian","family":"Pavon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Osman","family":"Unsal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Adrian","family":"Cristal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927484"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2016.34"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2017.53"},{"key":"ref13","article-title":"Accelerating CNN inference on FPGAs: A Survey","author":"abdelouahab","year":"2018","journal-title":"arXiv preprint arXiv 1806 01683"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3186332"},{"journal-title":"Intel launches new datacenter accelerator with its most powerful fpga","year":"2018","key":"ref15"},{"key":"ref16","article-title":"Accelerating deep convolutional neural networks using specialized hardware","volume":"2 11","author":"ovtcharov","year":"2015","journal-title":"Microsoft Research Whitepaper"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2016.7929192"},{"journal-title":"Methods and systems for hardware acceleration of streamed database operations and queries based on multiple hardware accelerators","year":"2015","author":"branscome","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2016.16"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2435264.2435345"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HPEC.2014.7040952"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2018.00057"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056784"},{"key":"ref8","first-page":"131","article-title":"Accelerating hash-based query processing operations on FPGAs by a hash table caching technique","author":"salami","year":"2016","journal-title":"Latin American High Performance Computing Conference"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2017.04.018"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2013.168"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2015.28"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723128"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3180155.3180220"},{"key":"ref22","first-page":"210","author":"cristal","year":"2018","journal-title":"LEGaTO first steps towards energy-efficient toolset for heterogeneous computing"},{"key":"ref21","first-page":"276","author":"cristal","year":"2018","journal-title":"LEGaTO towards energy-efficient secure faulttolerant toolset for heterogeneous computing"},{"key":"ref24","first-page":"724","author":"salami","year":"2018","journal-title":"Adrián Cristal Kestelman Comprehensive Evaluation of Supply Voltage Underscaling in FPGA on-Chip Memories"},{"key":"ref23","first-page":"242","author":"salami","year":"2019","journal-title":"Adrián Cristal Kestelman Evaluating Built-In ECC of FPGA On-Chip Memories for the Mitigation of Undervolting Faults"},{"key":"ref25","first-page":"85","author":"salami","year":"2018","journal-title":"Adrián Cristal Fault Characterization Through FPGA Undervolting"}],"event":{"name":"2019 International Conference on High Performance Computing & Simulation (HPCS)","start":{"date-parts":[[2019,7,15]]},"location":"Dublin, Ireland","end":{"date-parts":[[2019,7,19]]}},"container-title":["2019 International Conference on High Performance Computing & Simulation (HPCS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9183768\/9188050\/09188158.pdf?arnumber=9188158","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,17]],"date-time":"2022-07-17T17:50:27Z","timestamp":1658080227000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9188158\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/hpcs48598.2019.9188158","relation":{},"subject":[],"published":{"date-parts":[[2019,7]]}}}