{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:10:34Z","timestamp":1729663834839,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,7]]},"DOI":"10.1109\/hpcsim.2011.5999826","type":"proceedings-article","created":{"date-parts":[[2011,8,31]],"date-time":"2011-08-31T19:18:55Z","timestamp":1314818335000},"page":"207-214","source":"Crossref","is-referenced-by-count":0,"title":["Loop unrolling minimisation in the presence of multiple register types: A viable alternative to modulo variable expansion"],"prefix":"10.1109","author":[{"given":"Mounira","family":"Bachir","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Frederic","family":"Brault","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sid-Ahmed-Ali","family":"Touati","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Albert","family":"Cohen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"Contribution A? Lallocation de Registres dans les Boucles","year":"1996","author":"lelait","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1142\/S012962640400188X"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1016\/S0166-218X(99)00105-5"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/960116.54022"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/173262.155115"},{"journal-title":"Embedded Computing A VLIW Approach to Architecture Compilers and Tools","year":"2005","author":"fisher","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1992.697012"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/1375657.1375677"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/143103.143141"},{"journal-title":"Register Pressure in Instruction Level Parallelism","year":"2002","author":"touati","key":"8"},{"key":"11","doi-asserted-by":"crossref","first-page":"176","DOI":"10.1007\/3-540-55984-1_17","article-title":"A register allocation framework based on hierarchical cyclic interval graphs","author":"hendren","year":"1992","journal-title":"CC92 Proceedings of the 4th International Conference on Compiler Construction"},{"key":"12","doi-asserted-by":"crossref","first-page":"203","DOI":"10.1145\/342001.339682","article-title":"Lx: A technology platform for customizable vliw embedded processing","volume":"28","author":"faraboschi","year":"2000","journal-title":"SIGARCH Comput Archit News"}],"event":{"name":"Simulation (HPCS)","start":{"date-parts":[[2011,7,4]]},"location":"Istanbul, Turkey","end":{"date-parts":[[2011,7,8]]}},"container-title":["2011 International Conference on High Performance Computing & Simulation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5979720\/5999789\/05999826.pdf?arnumber=5999826","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T05:27:41Z","timestamp":1497936461000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5999826\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,7]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/hpcsim.2011.5999826","relation":{},"subject":[],"published":{"date-parts":[[2011,7]]}}}