{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T11:57:03Z","timestamp":1725451023974},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,7]]},"DOI":"10.1109\/hpcsim.2011.5999875","type":"proceedings-article","created":{"date-parts":[[2011,8,31]],"date-time":"2011-08-31T19:18:55Z","timestamp":1314818335000},"page":"461-467","source":"Crossref","is-referenced-by-count":3,"title":["A few lines of code, thousands of cores: High-level FPGA programming using vector processor networks"],"prefix":"10.1109","author":[{"given":"W.","family":"Vanderbauwhede","sequence":"first","affiliation":[]},{"given":"S. R.","family":"Chalamalasetti","sequence":"additional","affiliation":[]},{"given":"S.","family":"Purohit","sequence":"additional","affiliation":[]},{"given":"M.","family":"Margala","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"A New Simultaneous Compression & Encryption Method for Images Suitable to Recognize Form by Optical Correlation","year":"2009","author":"alfalou","key":"13"},{"key":"14","first-page":"232","article-title":"DCT and IDCT implementations on different FPGA technologies","author":"bukhari","year":"0","journal-title":"Proceedings of the 13th Annual Workshop on Circuits Systems and Signal Processing (ProRISC02)"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2007.4380748"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/SSST.2002.1026994"},{"key":"3","article-title":"Reconfigurable supercomputing with scalable systolic arrays and in-stream control for wavefront genomics processing","author":"pascoe","year":"2010","journal-title":"Proceedings of Symposium on Application Accelerators in HighPerformance Computing (SAAHPC)"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2007.71"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.65"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2009.5272461"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2007.89"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2004.1337598"},{"key":"5","first-page":"221","author":"santambrogio","year":"2007","journal-title":"A Novel Hardware\/Software Codesign Methodology Based on Dynamic Reconfiguration with Impulse C and Codeveloper"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2007.17"},{"key":"9","first-page":"195","article-title":"Programming model and low-level language for a coarse-grained reconfigurable multimedia processor","author":"vanderbauwhede","year":"2009","journal-title":"ERSA"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2010.5540750"}],"event":{"name":"Simulation (HPCS)","start":{"date-parts":[[2011,7,4]]},"location":"Istanbul, Turkey","end":{"date-parts":[[2011,7,8]]}},"container-title":["2011 International Conference on High Performance Computing & Simulation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5979720\/5999789\/05999875.pdf?arnumber=5999875","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T10:28:31Z","timestamp":1490092111000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5999875\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,7]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/hpcsim.2011.5999875","relation":{},"subject":[],"published":{"date-parts":[[2011,7]]}}}