{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T01:27:59Z","timestamp":1725672479962},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,7]]},"DOI":"10.1109\/hpcsim.2013.6641467","type":"proceedings-article","created":{"date-parts":[[2013,10,29]],"date-time":"2013-10-29T23:23:43Z","timestamp":1383089023000},"page":"552-554","source":"Crossref","is-referenced-by-count":5,"title":["Fault detection and tolerance mechanisms for future 1000 core systems"],"prefix":"10.1109","author":[{"given":"Bernhard","family":"Fechner","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arne","family":"Garbade","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sebastian","family":"Weis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Theo","family":"Ungerer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"year":"0","key":"17"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/SIES.2012.6356592"},{"key":"16","first-page":"38","article-title":"Th.Ungerer: A fault detection and recovery architecture for a teradevice dataflow system","author":"weis","year":"0","journal-title":"Proc 1st IEEE Workshop on Data-Flow Execution Models for Extreme Scale Computing"},{"journal-title":"AMD64 Architecture Programmer's Manual Volume 2 System Programming","year":"2006","key":"13"},{"key":"14","first-page":"191","article-title":"Fault localization in nocs by timed heartbeats","author":"fechner","year":"2012","journal-title":"Proc Of the 8th Workshop on Dependability and Fault Tolerance (ARCS \/VERFE 2012) LNI 200"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2003.1160055"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.119"},{"year":"0","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.65"},{"key":"1","first-page":"277","article-title":"T-star (t): An x86-64 isa extension to support thread execution on many cores","author":"portero","year":"2011","journal-title":"HiPEAC ACACES-2011"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/24.994926"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1995.466976"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/12.2145"},{"journal-title":"Reliable Computer Systems","year":"1992","author":"siewiorek","key":"5"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.110"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/43.55193"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.1676899"}],"event":{"name":"2013 International Conference on High Performance Computing & Simulation (HPCS)","start":{"date-parts":[[2013,7,1]]},"location":"Helsinki, Finland","end":{"date-parts":[[2013,7,5]]}},"container-title":["2013 International Conference on High Performance Computing & Simulation (HPCS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6619547\/6641375\/06641467.pdf?arnumber=6641467","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,10,14]],"date-time":"2020-10-14T15:09:22Z","timestamp":1602688162000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6641467"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,7]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/hpcsim.2013.6641467","relation":{},"subject":[],"published":{"date-parts":[[2013,7]]}}}