{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T01:39:15Z","timestamp":1729647555850,"version":"3.28.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,7]]},"DOI":"10.1109\/hpcsim.2014.6903662","type":"proceedings-article","created":{"date-parts":[[2014,9,29]],"date-time":"2014-09-29T21:29:42Z","timestamp":1412026182000},"page":"1-8","source":"Crossref","is-referenced-by-count":4,"title":["Multi-Kepler GPU vs. multi-intel MIC: A two test case performance study"],"prefix":"10.1109","author":[{"given":"Massimo","family":"Bernaschi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Francesco","family":"Salvadore","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1155\/2011\/473679"},{"journal-title":"OpenACC Directives for Accelerators","year":"0","key":"13"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1016\/j.jcp.2010.06.006"},{"key":"11","article-title":"Intel xeon phi coprocessor high performance programming","author":"jeffers","year":"2013","journal-title":"Morgan Jaufmann"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4302-5927-5"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2012.09.006"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1016\/j.cpc.2012.02.015"},{"key":"1","doi-asserted-by":"crossref","first-page":"6","DOI":"10.1016\/j.cpc.2011.02.012","article-title":"Benchmarking GPU and CPU codes for Heisenberg spin glass overrelaxation","volume":"182","author":"bernaschi","year":"2011","journal-title":"Computer Physics Communications"},{"journal-title":"Intel Xeon Phi Coprocessor 5110p","year":"0","key":"10"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-36949-0_61"},{"journal-title":"Simulating Spin Models on GPU","year":"2010","author":"weigel","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1016\/j.jcp.2009.03.018"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevD.23.2901"},{"journal-title":"NVIDIA CUDA Compute Unified Device Architecture Programming Guide","year":"0","key":"9"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-30961-8_21"}],"event":{"name":"2014 International Conference on High Performance Computing & Simulation (HPCS)","start":{"date-parts":[[2014,7,21]]},"location":"Bologna, Italy","end":{"date-parts":[[2014,7,25]]}},"container-title":["2014 International Conference on High Performance Computing & Simulation (HPCS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6895221\/6903651\/06903662.pdf?arnumber=6903662","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,10,14]],"date-time":"2020-10-14T15:22:47Z","timestamp":1602688967000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6903662"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,7]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/hpcsim.2014.6903662","relation":{},"subject":[],"published":{"date-parts":[[2014,7]]}}}