{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,4]],"date-time":"2025-04-04T11:24:46Z","timestamp":1743765886458},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,9]]},"DOI":"10.1109\/hpec.2015.7322447","type":"proceedings-article","created":{"date-parts":[[2015,11,12]],"date-time":"2015-11-12T18:12:34Z","timestamp":1447351954000},"page":"1-5","source":"Crossref","is-referenced-by-count":9,"title":["Agile Condor: A scalable high performance embedded computing architecture"],"prefix":"10.1109","author":[{"given":"Mark","family":"Barnell","sequence":"first","affiliation":[]},{"given":"Courtney","family":"Raymond","sequence":"additional","affiliation":[]},{"given":"Christopher","family":"Capraro","sequence":"additional","affiliation":[]},{"given":"Darrek","family":"Isereau","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","article-title":"Accelerating Cogent Confabulation: an Exploration in the Architecture Design Space","author":"qiu","year":"2008","journal-title":"2008 IEEE World Congress on Computational Intelligence"},{"key":"ref3","article-title":"Performance Optimization for Pattern Recognition using Associative Neural Memory","author":"wu","year":"2008","journal-title":"2008 IEEE International Conference on Multimedia and Expo ICME"},{"key":"ref6","article-title":"A Columnar Primary Visual Cortex (VI) Model Emulation Using a PS3 Cell-BE Array","author":"moore","year":"2010","journal-title":"Proc of IEEE World Congress on Computational Intelligence"},{"key":"ref5","article-title":"FPGA and Cell Processor Performance Optimization for Brain-State-in-a Box (BSB) Cognitive Computing","author":"linderman","year":"2007","journal-title":"2007 ARCS Symposium on Multicore and New Processing Technologies"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/RADAR.2012.6212256"},{"key":"ref7","article-title":"Columnar Vl\/V2 Visual Cortex Model and Emulation using a PS3 Cell-BE Array","author":"pino","year":"2011","journal-title":"Proc of International Joint Conference on Neural Networks"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.37"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MAES.2014.130054"},{"journal-title":"United States Air Force Chief Scientist","year":"2013","key":"ref1"}],"event":{"name":"2015 IEEE High Performance Extreme Computing Conference (HPEC)","start":{"date-parts":[[2015,9,15]]},"location":"Waltham, MA, USA","end":{"date-parts":[[2015,9,17]]}},"container-title":["2015 IEEE High Performance Extreme Computing Conference (HPEC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7311169\/7322434\/07322447.pdf?arnumber=7322447","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,25]],"date-time":"2017-03-25T00:55:42Z","timestamp":1490403342000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7322447\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,9]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/hpec.2015.7322447","relation":{},"subject":[],"published":{"date-parts":[[2015,9]]}}}