{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T11:39:08Z","timestamp":1725709148669},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,6]]},"DOI":"10.1109\/hpsr.2016.7525662","type":"proceedings-article","created":{"date-parts":[[2016,8,1]],"date-time":"2016-08-01T16:21:05Z","timestamp":1470068465000},"page":"168-175","source":"Crossref","is-referenced-by-count":4,"title":["P4GPU: Acceleration of programmable data plane using a CPU-GPU heterogeneous architecture"],"prefix":"10.1109","author":[{"given":"Peilong","family":"Li","sequence":"first","affiliation":[]},{"given":"Yan","family":"Luo","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"103","article-title":"Compiling packet programs to reconfigurable switches","author":"jose","year":"2015","journal-title":"USENIX Symposium on Networked Systems Design and Implementation (NSDI)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/INFCOM.2011.5935144"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ANCS.2013.6665171"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2534169.2486011"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837361"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.1289292"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/296502.296503"},{"article-title":"Fast And Space Efficient Trie Searches","year":"2000","author":"bagwell","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2015.08.002"},{"journal-title":"CAIDE","article-title":"Center for applied internet data analysis","year":"0","key":"ref19"},{"key":"ref4","article-title":"P4\/pif + c programmable intelligent nics: Requirements and implementation notes","author":"tnsing","year":"2015","journal-title":"The 2nd P4 Workshop"},{"journal-title":"I Netronome Systems","article-title":"Programming nfp with p4 and c","year":"2016","key":"ref3"},{"key":"ref6","article-title":"P4 for an fpga target","author":"brebner","year":"2015","journal-title":"The 1st P4 Workshop"},{"key":"ref5","article-title":"P4fpga: Towards an open source p4 backend for fpga","author":"wang","year":"2015","journal-title":"The 2nd P4 Workshop"},{"journal-title":"P4","article-title":"P4 language spec version 1.0.2","year":"0","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1851182.1851207"},{"key":"ref2","article-title":"P4 and open vswitch","author":"pfaff","year":"2015","journal-title":"Open vSwitch Project Tech Rep"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2656877.2656890"},{"journal-title":"P4","article-title":"P4 website","year":"0","key":"ref9"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TNET.2007.893156"}],"event":{"name":"2016 IEEE 17th International Conference on High Performance Switching and Routing (HPSR)","start":{"date-parts":[[2016,6,14]]},"location":"Yokohama, Japan","end":{"date-parts":[[2016,6,17]]}},"container-title":["2016 IEEE 17th International Conference on High Performance Switching and Routing (HPSR)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7514164\/7525624\/07525662.pdf?arnumber=7525662","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T20:54:56Z","timestamp":1475182496000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7525662\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,6]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/hpsr.2016.7525662","relation":{},"subject":[],"published":{"date-parts":[[2016,6]]}}}