{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,23]],"date-time":"2026-01-23T12:33:33Z","timestamp":1769171613002,"version":"3.49.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/hst.2016.7495565","type":"proceedings-article","created":{"date-parts":[[2016,6,25]],"date-time":"2016-06-25T07:39:11Z","timestamp":1466840351000},"page":"103-108","source":"Crossref","is-referenced-by-count":12,"title":["On the problems of realizing reliable and efficient ring oscillator PUFs on FPGAs"],"prefix":"10.1109","author":[{"given":"Alexander","family":"Wild","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Georg T.","family":"Becker","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tim","family":"Guneysu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-24676-3_31"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-33027-8_18"},{"key":"ref12","year":"2013","journal-title":"Spartan-6 Libraries Guide for HDL Designs"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1561\/1000000005"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513108"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1873548.1873557"},{"key":"ref4","first-page":"67","article-title":"Extended Cbstract: The Butterfly PUF Protecting IP on every FPGA","author":"kumar","year":"2008","journal-title":"HOST 2008"},{"key":"ref3","article-title":"Intrinsic PUFs from Flip-Flops on Reconfigurable Devices","author":"maes","year":"2008","journal-title":"WISSec 2008"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-010-0560-z"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513106"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2007.4380646"},{"key":"ref7","first-page":"63","article-title":"FPGA Intrinsic PUFs and Their Use for IP Protection","author":"guajardo","year":"2007","journal-title":"Proceedings of CHES 2007 Volume 4727 of LNCS"},{"key":"ref2","first-page":"369","article-title":"Read-Proof Hardware from Protective Coatings","author":"tuyls","year":"2006","journal-title":"CHES 2006 volume 4249 of LNCS"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/586110.586132"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513105"}],"event":{"name":"2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","location":"McLean, VA, USA","start":{"date-parts":[[2016,5,3]]},"end":{"date-parts":[[2016,5,5]]}},"container-title":["2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7489989\/7495545\/07495565.pdf?arnumber=7495565","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T09:03:17Z","timestamp":1475139797000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7495565\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/hst.2016.7495565","relation":{},"subject":[],"published":{"date-parts":[[2016,5]]}}}