{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:35:13Z","timestamp":1729665313800,"version":"3.28.0"},"reference-count":28,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/hst.2016.7495567","type":"proceedings-article","created":{"date-parts":[[2016,6,25]],"date-time":"2016-06-25T11:39:11Z","timestamp":1466854751000},"page":"114-119","source":"Crossref","is-referenced-by-count":0,"title":["SDSM: Fast and scalable security support for directory-based distributed shared memory"],"prefix":"10.1109","author":[{"given":"Ofir","family":"Shwartz","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yitzhak","family":"Birk","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"1","article-title":"Counter Mode Security: Analysis and Recommendations","author":"mcgrew","year":"2002"},{"key":"ref11","first-page":"351","article-title":"Fast secure processor for inhibiting software piracy and tampering","author":"yang","year":"2003","journal-title":"Proc Annu Int Symp Microarchitecture MICRO"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253207"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2004.1342547"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.31"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2007.4336203"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658636"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1065010.1065034"},{"key":"ref18","first-page":"1","article-title":"Parsec 2.0: A new benchmark suite for chip-multiprocessors","author":"bienia","year":"2009","journal-title":"5th Annu Work Model Benchmarking Simul"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1152154.1152170"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/773453.808204"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-21599-5_13"},{"article-title":"RFC2104 - HMAC: Keyed-hashing for message authentication","year":"1997","author":"krawczyk","key":"ref27"},{"key":"ref3","first-page":"1","article-title":"Innovative Technology for CPU Based Attestation and Sealing","author":"anati","year":"2013","journal-title":"Proc 2nd Int Workshop Hardw Archit Support Secur Priv - HASP 13"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1995896.1995914"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.25"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.16"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346284"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/782814.782838"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1536414.1536440"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/384264.379237"},{"journal-title":"N I of Science and Technology FIPS PUB 197 Advanced Encryption Standard (AES)","year":"2001","key":"ref20"},{"article-title":"White Paper Introduction to Intel&#x00AE; Architecture","year":"0","author":"turley","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1150019.1136502"},{"key":"ref24","first-page":"265279","article-title":"The Galois \/ Counter Mode of Operation (GCM) Intellectual Property Statement","volume":"67","author":"mcgrew","year":"2004"},{"article-title":"Chip to chip optical interconnect assembly","year":"0","author":"benjamin","key":"ref23"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2003.1183547"},{"key":"ref25","first-page":"333","article-title":"Analysis and Optimization of Galois \/ Counter Mode (GCM) using MPI","author":"hanifdurad","year":"2015","journal-title":"Gf 2128"}],"event":{"name":"2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","start":{"date-parts":[[2016,5,3]]},"location":"McLean, VA, USA","end":{"date-parts":[[2016,5,5]]}},"container-title":["2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7489989\/7495545\/07495567.pdf?arnumber=7495567","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T13:03:19Z","timestamp":1475154199000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7495567\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/hst.2016.7495567","relation":{},"subject":[],"published":{"date-parts":[[2016,5]]}}}