{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,25]],"date-time":"2025-10-25T12:41:07Z","timestamp":1761396067165,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,5,17]],"date-time":"2021-05-17T00:00:00Z","timestamp":1621209600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,5,17]],"date-time":"2021-05-17T00:00:00Z","timestamp":1621209600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,5,17]],"date-time":"2021-05-17T00:00:00Z","timestamp":1621209600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,5,17]]},"DOI":"10.1109\/i2mtc50364.2021.9459882","type":"proceedings-article","created":{"date-parts":[[2021,6,29]],"date-time":"2021-06-29T16:13:12Z","timestamp":1624983192000},"page":"1-6","source":"Crossref","is-referenced-by-count":6,"title":["A Method For Implementing Fractional Order Differentiator and Integrator Based on Digital Oscilloscope"],"prefix":"10.1109","author":[{"given":"Bo","family":"Xu","sequence":"first","affiliation":[]},{"given":"Kai","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Yifan","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Hang","family":"Geng","sequence":"additional","affiliation":[]},{"given":"Songting","family":"Zou","sequence":"additional","affiliation":[]},{"given":"Bo","family":"Yu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"1","author":"pu","year":"0","journal-title":"Ladder Scaling Fracmemristor A Second Emerging Circuit Structureof Fractional-Order Memristor"},{"key":"ref11","first-page":"1850081","volume":"28","author":"dong","year":"0","journal-title":"Topological Horseshoe Analysis Ultimate Boundary Estimations of a New 4D Hyperchaotic System and Its FPGA Implementation"},{"key":"ref12","first-page":"1765","volume":"55","author":"rana","year":"0","journal-title":"Implementation of fractional order integrator\/differentiator on field programmable gate array"},{"key":"ref13","first-page":"1","article-title":"FPGA implementation of fractional-order integrator and differentiator based on Gr&#x00FC;nwald Letnikov's definition","author":"tolba","year":"0","journal-title":"2017 29th International Conference on Microelectronics (ICM)"},{"key":"ref4","first-page":"16097","volume":"78","author":"sayed","year":"0","journal-title":"FPGA realization of a speech encryption system based on a generalized modified chaotic transition map and bit permutation"},{"key":"ref3","first-page":"3101","volume":"34","author":"rashtchi","year":"0","journal-title":"FPGA Implementation of a Real-Time Weak Signal Detector Using a Duffing Oscillator"},{"key":"ref6","first-page":"20109","author":"shen","year":"0","journal-title":"Real-time weak signal detecting using FPGA-based Duffing oscillator with auto-damping and high speed ADC"},{"key":"ref5","first-page":"174280","volume":"7","author":"tolba","year":"0","journal-title":"Digital Emulation of a Versatile Memristor With Speech Encryption Application"},{"key":"ref8","first-page":"1879","volume":"82","author":"tlelo-cuautle","year":"0","journal-title":"FPGA realization of a chaotic communication system applied to image processing"},{"key":"ref7","first-page":"2903","volume":"65","author":"pu","year":"0","journal-title":"Analog Circuit Implementation of Fractional-Order Memristor Arbitrary-Order Lattice Scaling Fracmernristor"},{"key":"ref2","first-page":"476","volume":"103","author":"rajagopal","year":"0","journal-title":"Chaotic chameleon Dynamic analyses circuit implementation FPGA design and fractional-order form with basic analyses"},{"journal-title":"Hardware realization of a secure and enhanced s-box based speech encryption engine","year":"0","author":"eisafty","key":"ref1"},{"key":"ref9","first-page":"56","volume":"89","author":"tolba","year":"0","journal-title":"Synchronization and FPGA realization of fractional-order Izhikevich neuron model"}],"event":{"name":"2021 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)","start":{"date-parts":[[2021,5,17]]},"location":"Glasgow, United Kingdom","end":{"date-parts":[[2021,5,20]]}},"container-title":["2021 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9459717\/9459787\/09459882.pdf?arnumber=9459882","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T11:42:50Z","timestamp":1652182970000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9459882\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5,17]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/i2mtc50364.2021.9459882","relation":{},"subject":[],"published":{"date-parts":[[2021,5,17]]}}}