{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T15:43:44Z","timestamp":1725464624781},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,11]]},"DOI":"10.1109\/iccad.2008.4681629","type":"proceedings-article","created":{"date-parts":[[2008,11,25]],"date-time":"2008-11-25T16:24:14Z","timestamp":1227630254000},"page":"549-554","source":"Crossref","is-referenced-by-count":1,"title":["FBT: Filled Buffer Technique to reduce code size for VLIW processors"],"prefix":"10.1109","author":[{"given":"Talal","family":"Bonny","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jorg","family":"Henkel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"15","first-page":"382","article-title":"code compression using variable-to-fixed coding based on arithmetic coding","author":"xie","year":"2003","journal-title":"Proceedings of the Conference on Data Compression"},{"key":"16","first-page":"525","article-title":"code compression for vliw processors using variable-to-fixed coding","author":"xie","year":"2006","journal-title":"IEEE Trans Very Large Scale Integration Systems"},{"year":"0","key":"13"},{"year":"0","key":"14"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/1086297.1086311"},{"journal-title":"Data Compression The Complete Reference","year":"2007","author":"salomon","key":"12"},{"journal-title":"Cycle Accurate Simulator for TMS320C62x","year":"0","author":"cuppu","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364390"},{"year":"0","key":"1"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/1023833.1023853"},{"key":"7","doi-asserted-by":"crossref","DOI":"10.1007\/3-540-63220-4_50","article-title":"space- and time-efficient decoding with canonical huffman trees","author":"klein","year":"1997","journal-title":"Proceedings of the 8th Annual Sym on Combinatorial Pattern Matching"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1147\/rd.426.0807"},{"key":"5","article-title":"mibench: a free, commercially representative embedded benchmark suite","author":"guthaus","year":"2002","journal-title":"IEEE 4th Annual Workshop on Workload Characterization"},{"journal-title":"MediaBench Project","year":"0","author":"fritts","key":"4"},{"article-title":"space\/time tradeoffs in code compression for the tms320c62x processor","year":"2004","author":"menon","key":"9"},{"key":"8","article-title":"lzw-based code compression for vliw embedded systems","author":"lin","year":"2004","journal-title":"Proc Design Automation and Test in Europe (DATE) Conf"}],"event":{"name":"2008 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","start":{"date-parts":[[2008,11,10]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2008,11,13]]}},"container-title":["2008 IEEE\/ACM International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4670335\/4681527\/04681629.pdf?arnumber=4681629","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T10:00:29Z","timestamp":1497780029000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4681629\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,11]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/iccad.2008.4681629","relation":{},"subject":[],"published":{"date-parts":[[2008,11]]}}}