{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T09:20:44Z","timestamp":1725614444498},"reference-count":25,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,11]]},"DOI":"10.1109\/iccad.2010.5654149","type":"proceedings-article","created":{"date-parts":[[2010,12,10]],"date-time":"2010-12-10T22:29:13Z","timestamp":1292020153000},"page":"224-229","source":"Crossref","is-referenced-by-count":2,"title":["On power and fault-tolerance optimization in FPGA physical synthesis"],"prefix":"10.1109","author":[{"given":"Manu","family":"Jose","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu","family":"Hu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rupak","family":"Majumdar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2003.159755"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837391"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/92.678870"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1145\/1344418.1344426"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723154"},{"key":"13","doi-asserted-by":"crossref","first-page":"330","DOI":"10.1145\/1278480.1278564","article-title":"single-event-upset (seu) awareness in fpga routing","author":"golshan","year":"2007","journal-title":"2007 44th ACM\/IEEE Design Automation Conference DAC"},{"key":"14","article-title":"Robust FPGA resynthesis based on fault tolerant boolean matching","author":"hu","year":"2008","journal-title":"Proc Int Conf on Computer Aided Design"},{"key":"11","article-title":"SEU strategies for virtex-5 devices","author":"chapman","year":"2009","journal-title":"XAPP864"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687422"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1145\/329166.329208"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1145\/1216919.1216931"},{"journal-title":"Architecture Design for Soft Errors","year":"2008","author":"mukherjee","key":"22"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.37"},{"journal-title":"Xilinx Corporation","article-title":"Xilinx TMRTool, Product brief","year":"2006","key":"24"},{"journal-title":"Logic Synthesis and Optimization Benchmarks Version 3 0 Technical Report Microelectronics Center of North Carolina (MCNC)","year":"1991","author":"yang","key":"25"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/296399.296426"},{"journal-title":"IWLS 2005 Benchmarks","year":"0","key":"2"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-5145-4"},{"journal-title":"ABC A System for Sequential Synthesis and Verification","year":"0","key":"1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1996.571342"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2007.910426"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/1046192.1046212"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681655"},{"key":"9","article-title":"VPR: A new packing, placement and routing tool for FPGA research","author":"betz","year":"1997","journal-title":"FPL"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1997.606687"}],"event":{"name":"2010 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","start":{"date-parts":[[2010,11,7]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2010,11,11]]}},"container-title":["2010 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5638200\/5648785\/05654149.pdf?arnumber=5654149","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T13:08:10Z","timestamp":1497877690000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5654149\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,11]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/iccad.2010.5654149","relation":{},"subject":[],"published":{"date-parts":[[2010,11]]}}}