{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T09:41:11Z","timestamp":1725615671847},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,11]]},"DOI":"10.1109\/iccad.2011.6105368","type":"proceedings-article","created":{"date-parts":[[2011,12,22]],"date-time":"2011-12-22T18:06:43Z","timestamp":1324577203000},"page":"456-462","source":"Crossref","is-referenced-by-count":3,"title":["Defect-tolerant logic implementation onto nanocrossbars by exploiting mapping and morphing simultaneously"],"prefix":"10.1109","author":[{"given":"Yehua","family":"Su","sequence":"first","affiliation":[]},{"given":"Wenjing","family":"Rao","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2010.5469605"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2009.16"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2010.5647818"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2004.1393250"},{"key":"16","first-page":"1279","article-title":"Defect-aware logic mapping for nanowirebased programmable logic arrays via satisfiability","author":"zheng","year":"2009","journal-title":"Design Automation and Test in Europe (DATE)"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-006-0547-7"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2004.1347829"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-74747-7_5"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147093"},{"journal-title":"1993 LGSynth Benchmarks","year":"1993","key":"21"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1166\/jnn.2007.013"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1949.tb03624.x"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1002\/9780470168264"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2007.7"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2011.1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/1284621.1284644"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1084748.1084750"},{"key":"5","first-page":"141","article-title":"Towards nanocomputer architecture","author":"beckett","year":"2001","journal-title":"Asia-Pacific Computer System Architecture Conference"},{"journal-title":"International Technology Roadmap for Semiconductors","year":"2009","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2011.44"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2003.808508"}],"event":{"name":"2011 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","start":{"date-parts":[[2011,11,7]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2011,11,10]]}},"container-title":["2011 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6095474\/6105287\/06105368.pdf?arnumber=6105368","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T15:33:50Z","timestamp":1490110430000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6105368\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,11]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iccad.2011.6105368","relation":{},"subject":[],"published":{"date-parts":[[2011,11]]}}}