{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,29]],"date-time":"2025-12-29T22:12:38Z","timestamp":1767046358671},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,11]]},"DOI":"10.1109\/iccad.2013.6691139","type":"proceedings-article","created":{"date-parts":[[2014,3,7]],"date-time":"2014-03-07T17:22:41Z","timestamp":1394212961000},"page":"326-333","source":"Crossref","is-referenced-by-count":7,"title":["Leveraging rule-based designs for automatic power domain partitioning"],"prefix":"10.1109","author":[{"given":"Abhinav","family":"Agarwal","sequence":"first","affiliation":[]},{"family":"Arvind","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1145\/1859878.1859879"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/MEMCOD.2006.1695900"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6481-6"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/MEMCOD.2007.371247"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/1835420.1835421"},{"journal-title":"Leakage in Nanometer CMOS Technologies (Series on Integrated Circuits and Systems)","year":"2005","author":"narendra","key":"13"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1145\/1872007.1872013"},{"journal-title":"Low Power Methodology Manual For System-on-Chip Design","year":"2007","author":"keating","key":"11"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403466"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024945"},{"journal-title":"Bluespec? SystemVerilog Reference Guide","year":"2009","key":"3"},{"key":"20","article-title":"A design approach for fine-grained run-time power gating using locally extracted sleep signals","author":"usami","year":"2006","journal-title":"24th International Conference on Computer Design"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884054"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2010.2055231"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681547"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-68953-1"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.243993"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871538"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871535"},{"journal-title":"International Technology Roadmap for Semiconductors Design","year":"2011","key":"9"},{"key":"8","doi-asserted-by":"crossref","first-page":"81","DOI":"10.1145\/1278480.1278502","article-title":"fine-grained sleep transistor sizing algorithm for leakage power minimization","author":"de-shiuan chiou","year":"2007","journal-title":"2007 44th ACM\/IEEE Design Automation Conference DAC"}],"event":{"name":"2013 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","start":{"date-parts":[[2013,11,18]]},"location":"San Jose, CA","end":{"date-parts":[[2013,11,21]]}},"container-title":["2013 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6679730\/6691081\/06691139.pdf?arnumber=6691139","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,3,14]],"date-time":"2019-03-14T18:37:33Z","timestamp":1552588653000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6691139\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,11]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iccad.2013.6691139","relation":{},"subject":[],"published":{"date-parts":[[2013,11]]}}}