{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,24]],"date-time":"2025-10-24T16:39:43Z","timestamp":1761323983162,"version":"3.28.0"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,11]]},"DOI":"10.1109\/iccad.2014.7001343","type":"proceedings-article","created":{"date-parts":[[2015,1,13]],"date-time":"2015-01-13T20:11:15Z","timestamp":1421179875000},"page":"132-139","source":"Crossref","is-referenced-by-count":20,"title":["Energy-efficient architecture for advanced video memory"],"prefix":"10.1109","author":[{"given":"Felipe","family":"Sampaio","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Muhammad","family":"Shafique","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bruno","family":"Zatt","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sergio","family":"Bampi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jorg","family":"Henkel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"45","article-title":"Dyn. reconfigurable hybrid cache: An energy-efficient last-level cache design","author":"chen","year":"2012","journal-title":"IEEE\/ACM DATE"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6479019"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"554","DOI":"10.1145\/1391469.1391610","article-title":"circuit and microarchitecture evaluation of 3d stacking magnetic ram (mram) as a universal memory replacement","author":"xiangyu dong","year":"2008","journal-title":"2008 45th ACM\/IEEE Design Automation Conference DAC"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555761"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228406"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1880037.1880040"},{"key":"ref16","first-page":"34","article-title":"Hybrid cache architecture with disparate memory technologies","volume":"37","author":"li","year":"2009","journal-title":"ACM SIGARCH CAN"},{"key":"ref17","first-page":"79","article-title":"High-endurance and performance-efficient design of hybrid cache arch. through adaptive line replacement","author":"jadidi","year":"2011","journal-title":"ACM\/IEEE ISLPED"},{"key":"ref18","first-page":"553","article-title":"Level C+ Data Reuse Scheme for Motion Estimation with Corresponding Coding Orders","volume":"16","author":"chen","year":"2006","journal-title":"IEEE TCSVT"},{"key":"ref19","article-title":"Common test conditions and software reference configurations","author":"bossen","year":"2012","journal-title":"ITU-T\/ISO\/IEC JCTVC-K1100"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457091"},{"key":"ref3","first-page":"866","article-title":"Adaptive Power Management of On-Chip Video Mamory for Multiview Video Coding","author":"shafique","year":"2012","journal-title":"ACM\/EDA\/IEEE DAC"},{"journal-title":"JCT-VC HEVC Software SVN","year":"2011","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457093"},{"key":"ref8","article-title":"dSVM: Energy-Efficient Dist. Scratchpad Video Memory Architecture for the Next-Generation High Efficiency Video Coding","author":"sampaio","year":"2014","journal-title":"IEEE\/ACM DATE"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MCE.2012.2192754"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024950"},{"year":"2013","key":"ref1","article-title":"High Efficiency Video Coding (HEVC) text specification draft 10 (for FDIS & Consent)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691150"},{"first-page":"168","article-title":"4Gb: x16, x32 Mobile LPDDR2 SDRAM S4","year":"2013","key":"ref20"},{"year":"2009","key":"ref22","article-title":"TN-46–12 DRAM Power-Saving Features\/Cales"},{"year":"2005","key":"ref21","article-title":"TN-46–03 Calc. DDR Mem. System Power"},{"article-title":"CACTI 5.1 tech. report","year":"2008","author":"thoziyoor","key":"ref24"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.904101"}],"event":{"name":"2014 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","start":{"date-parts":[[2014,11,2]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2014,11,6]]}},"container-title":["2014 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6991350\/7001313\/07001343.pdf?arnumber=7001343","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T03:34:28Z","timestamp":1498188868000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7001343\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/iccad.2014.7001343","relation":{},"subject":[],"published":{"date-parts":[[2014,11]]}}}