{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T16:22:34Z","timestamp":1729614154355,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,11]]},"DOI":"10.1109\/iccad.2017.8203766","type":"proceedings-article","created":{"date-parts":[[2017,12,14]],"date-time":"2017-12-14T22:02:04Z","timestamp":1513288924000},"page":"101-108","source":"Crossref","is-referenced-by-count":1,"title":["An automated SAT-based method for the design of on-chip bit-flip detectors"],"prefix":"10.1109","author":[{"given":"Pouya","family":"Taatizadeh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nicola","family":"Nicolici","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"1","DOI":"10.3233\/SAT190014","article-title":"Translating pseudo-boolean constraints into SAT","volume":"2","author":"e\u00e8n","year":"2006","journal-title":"Journal on Satisfiability Boolean Modeling and Computation"},{"key":"ref11","first-page":"399","article-title":"Predicting learnt clauses quality in modern SAT solvers","author":"audemard","year":"2009","journal-title":"IJCAI"},{"journal-title":"Assertion-Based Design","year":"2004","author":"foster","key":"ref12"},{"journal-title":"ABC A System for Sequential Synthesis and Verification","year":"0","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1989.100747"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2001.935512"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2013.2274651"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2241176"},{"key":"ref4","first-page":"90","article-title":"A case study of time-multiplexed assertion checking for post-silicon debugging","author":"gao","year":"2010","journal-title":"IEEE International High Level Design Validation and Test Workshop (HLDVT)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2007.38"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/800157.805047"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2538087"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379017"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1996.569607"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146916"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837280"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337611"}],"event":{"name":"2017 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","start":{"date-parts":[[2017,11,13]]},"location":"Irvine, CA","end":{"date-parts":[[2017,11,16]]}},"container-title":["2017 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8167715\/8203744\/08203766.pdf?arnumber=8203766","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,10,24]],"date-time":"2020-10-24T09:07:47Z","timestamp":1603530467000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8203766\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,11]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/iccad.2017.8203766","relation":{},"subject":[],"published":{"date-parts":[[2017,11]]}}}