{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,9]],"date-time":"2025-04-09T06:11:01Z","timestamp":1744179061679,"version":"3.28.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,11]]},"DOI":"10.1109\/iccad.2017.8203850","type":"proceedings-article","created":{"date-parts":[[2017,12,14]],"date-time":"2017-12-14T22:02:04Z","timestamp":1513288924000},"page":"736-742","source":"Crossref","is-referenced-by-count":6,"title":["Towards warp-scheduler friendly STT-RAM\/SRAM hybrid GPGPU register file design"],"prefix":"10.1109","author":[{"given":"Quan","family":"Deng","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Youtao","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minxuan","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jun","family":"Yang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838432"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2016.2546249"},{"key":"ref12","article-title":"A 3.3 ns-access-time 71.2µW\/MHz 1Mb Embedded STT-MRAM using Physically Eliminated Read-disturb Scheme and Normally-off Memory Architecture","author":"noguchi","year":"2015","journal-title":"ISSCC"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2016.2602880"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.16"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2016.2580532"},{"key":"ref16","article-title":"An Efficient STT-RAM Last Level Cache Architecture For GPUs","author":"samavatian","year":"2014","journal-title":"DAC"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2375187"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446078"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555761"},{"key":"ref4","article-title":"Complementary Polarizers STT-MRAM (CPSTT) for On-Chip Caches","volume":"34","author":"fong","year":"2013","journal-title":"EDL"},{"key":"ref3","article-title":"NVSim: A Circuit-Level Performance, Energy, And Area Model For Emerging Nonvolatile Memory","author":"dong","year":"2012","journal-title":"TCAD 31 994–1007"},{"key":"ref6","article-title":"Bank Stealing For Conflict Mitigation In GPGPU Register File","author":"jing","year":"2015","journal-title":"ISLPED"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522331"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485964"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446079"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838490"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744785"},{"key":"ref20","doi-asserted-by":"crossref","DOI":"10.1145\/2966986.2967060","article-title":"ODESY: A Novel 3T-3MTJ Cell Design with Optimized Area DEnsity, Scalability And LatencY","author":"xue","year":"2016","journal-title":"ICCAD"},{"key":"ref22","article-title":"Static random access memory","author":"wei","year":"2005","journal-title":"US Patent"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2897989"}],"event":{"name":"2017 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","start":{"date-parts":[[2017,11,13]]},"location":"Irvine, CA","end":{"date-parts":[[2017,11,16]]}},"container-title":["2017 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8167715\/8203744\/08203850.pdf?arnumber=8203850","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,25]],"date-time":"2022-01-25T22:54:03Z","timestamp":1643151243000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8203850\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,11]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/iccad.2017.8203850","relation":{},"subject":[],"published":{"date-parts":[[2017,11]]}}}