{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T08:48:59Z","timestamp":1774687739725,"version":"3.50.1"},"reference-count":46,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,11]]},"DOI":"10.1109\/iccad45719.2019.8942060","type":"proceedings-article","created":{"date-parts":[[2020,1,3]],"date-time":"2020-01-03T00:44:25Z","timestamp":1578012265000},"page":"1-8","source":"Crossref","is-referenced-by-count":73,"title":["MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper"],"prefix":"10.1109","author":[{"given":"Biying","family":"Xu","sequence":"first","affiliation":[]},{"given":"Keren","family":"Zhu","sequence":"additional","affiliation":[]},{"given":"Mingjie","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Yibo","family":"Lin","sequence":"additional","affiliation":[]},{"given":"Shaolan","family":"Li","sequence":"additional","affiliation":[]},{"given":"Xiyuan","family":"Tang","sequence":"additional","affiliation":[]},{"given":"Nan","family":"Sun","sequence":"additional","affiliation":[]},{"given":"David Z.","family":"Pan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.18603"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.75012"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/4.391116"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/RME.2006.1689934"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2269050"},{"key":"ref6","volume-title":"Analog layout generation for performance and manufacturability","volume":"501","author":"Lampaert","year":"2013"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681591"},{"issue":"6","key":"ref8","first-page":"791","article-title":"Analog placement based on symmetry-island formulation","volume-title":"IEEE TCAD","volume":"28","author":"Lin","year":"2009"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2064490"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2226457"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3036669.3036678"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3177540.3178245"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2501293"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2165068"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2279516"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.7873\/DATE2014.023"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1840845.1840872"},{"key":"ref18","volume-title":"Design of Analog CMOS Integrated Circuits","author":"Razavi","year":"2001"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2501293"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2097172"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2006143"},{"key":"ref22","first-page":"1339","article-title":"Constraints generation for analog circuits layout","volume-title":"2004 International Conference on Communications, Circuits and Systems","volume":"2","author":"Hao","year":"2004"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2015.7300111"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3299902.3309751"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923063"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1587\/transfun.E96.A.1348"},{"key":"ref27","volume-title":"Non-linear optimization system and method for wire length and delay optimization for an automatic electric circuit placer","author":"Naylor","year":"2001"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1987.1270329"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317930"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654239"},{"key":"ref31","doi-asserted-by":"crossref","DOI":"10.1109\/ICCAD45719.2019.8942164","article-title":"Geniusroute: A new analog routing paradigm using generative neural network guidance","volume-title":"Proc. ICCAD","author":"Zhu","year":"2019"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3323477"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3326334"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3323471"},{"key":"ref35","volume-title":"RAIL12","year":"2019"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240766"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287678"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2019.00105"},{"key":"ref39","volume-title":"Sanitizer","year":"2019"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2017.8240258"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2018.8502424"},{"key":"ref42","volume-title":"MAGICAL-CIRCUITS","year":"2019"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2656864"},{"key":"ref44","volume-title":"AMPSE","year":"2019"},{"key":"ref45","article-title":"A 9-bit resistor-based all-digital temperature sensor with a sar-quantization embedded differential lowpass filter in 65nm cmos consuming 57pj with a $2.5\\ \\mu\\mathrm{s}$ conversion time","volume-title":"Proc. CICC","author":"Wang","year":"2019"},{"key":"ref46","volume-title":"UW-IDEA_AnalogTestCases","year":"2019"}],"event":{"name":"2019 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","location":"Westminster, CO, USA","start":{"date-parts":[[2019,11,4]]},"end":{"date-parts":[[2019,11,7]]}},"container-title":["2019 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8931666\/8942037\/08942060.pdf?arnumber=8942060","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,24]],"date-time":"2024-01-24T00:12:57Z","timestamp":1706055177000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8942060\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,11]]},"references-count":46,"URL":"https:\/\/doi.org\/10.1109\/iccad45719.2019.8942060","relation":{},"subject":[],"published":{"date-parts":[[2019,11]]}}}