{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T01:13:49Z","timestamp":1740100429071,"version":"3.37.3"},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,11,1]],"date-time":"2021-11-01T00:00:00Z","timestamp":1635724800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,11,1]],"date-time":"2021-11-01T00:00:00Z","timestamp":1635724800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,11,1]],"date-time":"2021-11-01T00:00:00Z","timestamp":1635724800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000185","name":"DARPA","doi-asserted-by":"publisher","award":["HR0011-18-3-0007"],"award-info":[{"award-number":["HR0011-18-3-0007"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,11,1]]},"DOI":"10.1109\/iccad51958.2021.9643499","type":"proceedings-article","created":{"date-parts":[[2021,12,23]],"date-time":"2021-12-23T23:06:46Z","timestamp":1640300806000},"page":"1-9","source":"Crossref","is-referenced-by-count":0,"title":["IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs"],"prefix":"10.1109","author":[{"given":"Nathaniel","family":"Pinckney","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rangharajan","family":"Venkatesan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ben","family":"Keller","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Brucek","family":"Khailany","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218553"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2005.22"},{"key":"ref12","first-page":"1","article-title":"A NoC system generator for the Sea-of-Cores era","author":"\u00f6berg","year":"2011","journal-title":"Proceedings of the 8th FPGAWorld Conference on - FPGAWorld '11"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2017.7975291"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415656"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228584"},{"journal-title":"YAML Ain't Markup Language (YAML™) Version 1 2","year":"2009","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/BF01660031"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/0376-5075(79)90032-1"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942127"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/5.52214"},{"journal-title":"NVlabs\/matchlib","year":"2021","key":"ref3"},{"key":"ref6","article-title":"Transaction Level Modeling using OSCI TLM 2. 0","author":"montoreano","year":"2007","journal-title":"White Paper"},{"key":"ref5","first-page":"56","article-title":"Flow Control with Skid Buffers","year":"2020","journal-title":"Intel Hyperflex Architecture High-Performance Design Handbook"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2953878"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557149"},{"journal-title":"HLSLibs Homepage for a faster path to hardware acceleration","year":"0","key":"ref2"},{"key":"ref1","first-page":"72: 1","article-title":"A Modular Digital VLSI Flow for High-productivity SoC Design","author":"khailany","year":"2018","journal-title":"Proceedings of the 55th Annual Design Automation Conference ser DAC '18"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2685342.2685351"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2960488"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2009.5206848"}],"event":{"name":"2021 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)","start":{"date-parts":[[2021,11,1]]},"location":"Munich, Germany","end":{"date-parts":[[2021,11,4]]}},"container-title":["2021 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9643423\/9643432\/09643499.pdf?arnumber=9643499","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T16:55:13Z","timestamp":1652201713000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9643499\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,11,1]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iccad51958.2021.9643499","relation":{},"subject":[],"published":{"date-parts":[[2021,11,1]]}}}