{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T00:10:48Z","timestamp":1780445448990,"version":"3.54.1"},"reference-count":34,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T00:00:00Z","timestamp":1761436800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T00:00:00Z","timestamp":1761436800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,10,26]]},"DOI":"10.1109\/iccad66269.2025.11240659","type":"proceedings-article","created":{"date-parts":[[2025,11,20]],"date-time":"2025-11-20T18:39:34Z","timestamp":1763663974000},"page":"1-9","source":"Crossref","is-referenced-by-count":1,"title":["Rhea: a Framework for Fast Design and Validation of RTL Cache-Coherent Memory Subsystems"],"prefix":"10.1109","author":[{"given":"Davide","family":"Zoni","sequence":"first","affiliation":[{"name":"Informazione e Bioingegneria (DEIB),Dipartimento di Elettronica,Milano,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Andrea","family":"Galimberti","sequence":"additional","affiliation":[{"name":"Informazione e Bioingegneria (DEIB),Dipartimento di Elettronica,Milano,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Adriano","family":"Guarisco","sequence":"additional","affiliation":[{"name":"Informazione e Bioingegneria (DEIB),Dipartimento di Elettronica,Milano,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","author":"Sorin","year":"2022","journal-title":"A Primer on Memory Consistency and Cache Coherence. Springer Nature"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS58634.2023.10382918"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2025.3551936"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS61496.2024.10848855"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3593044"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2063384.2063454"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2997706"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2996616"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DCIS58620.2023.10335973"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3472456.3472461"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/FPL64840.2024.00027"},{"key":"ref13","article-title":"Verilator 4.0: Open Simulation Goes Multithreaded","volume-title":"Open Source Digital Design Conference (ORConf)","author":"Snyder"},{"key":"ref14","first-page":"335","article-title":"Multi2Sim: a simulation framework for CPU-GPU computing","volume-title":"Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques","author":"Ubal"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/4.509850"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2445572.2445577"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783751"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2019.00031"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2024.103211"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.36"},{"key":"ref21","first-page":"463","article-title":"RAMP gold: an FPGA-based architecture simulator for multiprocessors","volume-title":"Proceedings of the 47th Design Automation Conference","author":"Tan"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749747"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2012.6189224"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00014"},{"key":"ref25","doi-asserted-by":"crossref","DOI":"10.1145\/3400302.3415753","article-title":"Agile SoC development with open ESP","volume-title":"Proceedings of the 39th International Conference on Computer-Aided Design","author":"Mantovani"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2996145"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD63220.2024.00108"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS56072.2025.11043238"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID57277.2023.00023"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA59077.2024.00061"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2016.2615617"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056775"},{"key":"ref33","first-page":"72","article-title":"The PARSEC Benchmark Suite: Characterization and Architectural Implications","volume-title":"Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques","author":"Bienia"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2016.7482078"}],"event":{"name":"2025 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)","location":"Munich, Germany","start":{"date-parts":[[2025,10,26]]},"end":{"date-parts":[[2025,10,30]]}},"container-title":["2025 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11240608\/11240621\/11240659.pdf?arnumber=11240659","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T05:42:36Z","timestamp":1763703756000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11240659\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,26]]},"references-count":34,"URL":"https:\/\/doi.org\/10.1109\/iccad66269.2025.11240659","relation":{},"subject":[],"published":{"date-parts":[[2025,10,26]]}}}