{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T05:57:23Z","timestamp":1763704643475,"version":"3.45.0"},"reference-count":44,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T00:00:00Z","timestamp":1761436800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T00:00:00Z","timestamp":1761436800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,10,26]]},"DOI":"10.1109\/iccad66269.2025.11240966","type":"proceedings-article","created":{"date-parts":[[2025,11,20]],"date-time":"2025-11-20T18:39:34Z","timestamp":1763663974000},"page":"1-9","source":"Crossref","is-referenced-by-count":0,"title":["Pathfinder: Constructing Cycle-accurate Taint Graphs for Analyzing Information Flow Traces"],"prefix":"10.1109","author":[{"given":"Katharina","family":"Ceesay-Seitz","sequence":"first","affiliation":[{"name":"ETH Zurich,Switzerland"}]},{"given":"Flavien","family":"Solt","sequence":"additional","affiliation":[{"name":"UC Berkeley,USA"}]},{"given":"Alexander","family":"Klukas","sequence":"additional","affiliation":[{"name":"ETH Zurich,Switzerland"}]},{"given":"Kaveh","family":"Razavi","sequence":"additional","affiliation":[{"name":"ETH Zurich,Switzerland"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00002"},{"key":"ref2","doi-asserted-by":"crossref","DOI":"10.1145\/3357033","article-title":"Meltdown: Reading kernel memory from user space","volume-title":"USENIX Security","author":"Lipp"},{"article-title":"Gofetch: Breaking constant-time cryptographic implementations using data memory-dependent prefetchers","volume-title":"USENIX Security","author":"Chen","key":"ref3"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3649329.3658469"},{"article-title":"\u00b5cfi: Formal verification of microarchitectural control-flow integrity","volume-title":"Proceedings of the 2024 ACM SIGSAC Conference on Computer and Communications Security","author":"Ceesay-Seitz","key":"ref5"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715004"},{"key":"ref7","first-page":"7303","article-title":"Inception: Exposing new attack surfaces with training in transient execution","volume-title":"32nd USENIX Security Symposium (USENIX Security 23)","author":"Trujillo"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SP61157.2025.00089"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3503222.3507729"},{"article-title":"Cascade: CPU Fuzzing via Intricate Program Generation","volume-title":"USENIX Security 2024","author":"Solt","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SP54263.2024.00180"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3576915.3623192"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3669940.3707243"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD51958.2021.9643538"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1508284.1508258"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927266"},{"key":"ref17","first-page":"2549","article-title":"Cellift: Leveraging cells for scalable and precise dynamic information flow tracking in rtl","volume-title":"31st USENIX Security Symposium (USENIX Security 22)","author":"Solt"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3676536.3676658"},{"key":"ref19","first-page":"871","article-title":"Autocc: Automatic discovery of covert channels in time-shared hardware","volume-title":"Proceedings of the 56th Annual IEEE\/ACM International Symposium on Microarchitecture","author":"Orenes-Vera"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO61859.2024.00045"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240839"},{"key":"ref22","first-page":"254","article-title":"Information flow isolation in i2c and usb","volume-title":"Proceedings of the 48th Design Automation Conference","author":"Oberg"},{"key":"ref23","article-title":"The 2022 Wilson Research Group Functional Verification Study"},{"article-title":"Yosys-a free Verilog synthesis suite","volume-title":"Austrochip","author":"Wolf","key":"ref24"},{"journal-title":"IEEE Std 1800-2023 (Revision of IEEE Std 1800-2017)","article-title":"Ieee standard for systemverilog\u2013unified hardware design, specification, and verification language","year":"2024","key":"ref25"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2331332"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00011"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-13185-1_20"},{"article-title":"WhisperFuzz: White-box fuzzing for detecting and locating timing vulnerabilities in processors","volume-title":"USENIX Security","author":"Borkar","key":"ref29"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2120970"},{"article-title":"Information flow coverage metrics for hardware security verification","year":"2023","author":"Meza","key":"ref31"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD63220.2024.00029"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00073"},{"article-title":"Phantom trails: Practical pre-silicon discovery of transient data leaks","volume-title":"USENIX Security","author":"de Faveri Tron","key":"ref34"},{"article-title":"Milesan: Detecting exploitable microarchitectural leakage via differential hardware-software taint tracking","volume-title":"Proceedings of the 2025 ACM SIGSAC Conference on Computer and Communications Security","author":"Kovats","key":"ref35"},{"volume-title":"vcdvcd - Python Verilog value change dump (VCD) parser library","key":"ref36"},{"volume-title":"Pandas","key":"ref37"},{"volume-title":"CVA6 RISC-V CPU","key":"ref39"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358274"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-32-9767-8_35"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2921374"},{"volume-title":"Questa Verify Secure","key":"ref43"},{"volume-title":"Cycuity Radix Technology","key":"ref44"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-19751-2_5"}],"event":{"name":"2025 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)","start":{"date-parts":[[2025,10,26]]},"location":"Munich, Germany","end":{"date-parts":[[2025,10,30]]}},"container-title":["2025 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11240608\/11240621\/11240966.pdf?arnumber=11240966","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T05:46:59Z","timestamp":1763704019000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11240966\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,26]]},"references-count":44,"URL":"https:\/\/doi.org\/10.1109\/iccad66269.2025.11240966","relation":{},"subject":[],"published":{"date-parts":[[2025,10,26]]}}}