{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T05:57:21Z","timestamp":1763704641267,"version":"3.45.0"},"reference-count":26,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T00:00:00Z","timestamp":1761436800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T00:00:00Z","timestamp":1761436800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,10,26]]},"DOI":"10.1109\/iccad66269.2025.11240989","type":"proceedings-article","created":{"date-parts":[[2025,11,20]],"date-time":"2025-11-20T18:39:34Z","timestamp":1763663974000},"page":"1-8","source":"Crossref","is-referenced-by-count":0,"title":["CIMWise: An IREE-based End-To-End AI Compiler with Auto-Tuning for CIM Processors"],"prefix":"10.1109","author":[{"given":"Bo","family":"Mai","sequence":"first","affiliation":[{"name":"Southern University of Science and Technology,School of Microelectronics,Shenzhen,China"}]},{"given":"Jin","family":"Wang","sequence":"additional","affiliation":[{"name":"Southern University of Science and Technology,School of Microelectronics,Shenzhen,China"}]},{"given":"Zhen","family":"Zhai","sequence":"additional","affiliation":[{"name":"Southern University of Science and Technology,School of Microelectronics,Shenzhen,China"}]},{"given":"Liang","family":"Zhang","sequence":"additional","affiliation":[{"name":"Southern University of Science and Technology,School of Microelectronics,Shenzhen,China"}]},{"given":"Yufu","family":"Zhang","sequence":"additional","affiliation":[{"name":"Southern University of Science and Technology,School of Microelectronics,Shenzhen,China"}]},{"given":"Longyang","family":"Lin","sequence":"additional","affiliation":[{"name":"Southern University of Science and Technology,School of Microelectronics,Shenzhen,China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.12"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304049"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/tc.2020.2998456"},{"key":"ref4","first-page":"1","article-title":"AtomLayer: A Universal ReRAM-Based CNN Accelerator with Atomic Layer Computation","volume-title":"2018 55th ACM\/ESDA\/IEEE Design Automation Conference (DAC)","author":"Qiao"},{"key":"ref5","first-page":"832","article-title":"Timely: Pushing Data Movements And Interfaces In Pim Accelerators Towards Local And In Time Domain","volume-title":"2020 ACM\/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)","author":"Li"},{"key":"ref6","first-page":"265","article-title":"FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-signal DNN Accelerator","volume-title":"2021 ACM\/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)","author":"Yuan"},{"key":"ref7","first-page":"1","article-title":"Rimac: An array-level adc\/dac-free reram-based in-memory dnn processor with analog cache and computation","volume-title":"2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC)","author":"Chen"},{"issue":"9","key":"ref8","first-page":"680","article-title":"A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference","volume-title":"Nature Electronics","volume":"6","author":"Le Gallo","year":"2023"},{"issue":"5","key":"ref9","first-page":"1436","article-title":"PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference","volume-title":"IEEE Journal of Solid-State Circuits","volume":"58","author":"Zhang","year":"2023"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CICC63670.2025.10983287"},{"key":"ref11","first-page":"1","article-title":"PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators","volume-title":"2023 60th ACM\/IEEE Design Automation Conference (DAC)","author":"Sun"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3620665.3640359"},{"article-title":"Tc-cim: Empowering tensor comprehensions for computing-in-memory","volume-title":"IMPACT 2020 workshop (associated with HIPEAC 2020)","author":"Drebes","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3469847"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586247"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-021-04196-6"},{"key":"ref17","volume-title":"TVM: end-to-end optimization stack for deep learning","volume":"abs\/1802.04799","author":"Chen","year":"2018"},{"year":"2019","key":"ref18","article-title":"IREE"},{"key":"ref19","volume-title":"BERT: pre-training of deep bidirectional transformers for language understanding","volume":"abs\/1810.04805","author":"Devlin","year":"2018"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref21","volume-title":"Very deep convolutional networks for large-scale image recognition","volume":"abs\/1409.1556","author":"Simonyan","year":"2014"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"},{"key":"ref23","volume-title":"MLIR: A compiler infrastructure for the end of moore\u2019s law","volume":"abs\/2002.11054","author":"Lattner","year":"2020"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-023-01010-1"},{"article-title":"Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach Using MAESTRO","year":"2020","author":"Kwon","key":"ref25"},{"key":"ref26","doi-asserted-by":"crossref","DOI":"10.1145\/3622781.3674189","article-title":"CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms","author":"Khan","year":"2024"}],"event":{"name":"2025 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)","start":{"date-parts":[[2025,10,26]]},"location":"Munich, Germany","end":{"date-parts":[[2025,10,30]]}},"container-title":["2025 IEEE\/ACM International Conference On Computer Aided Design (ICCAD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11240608\/11240621\/11240989.pdf?arnumber=11240989","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T05:47:21Z","timestamp":1763704041000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11240989\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,26]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/iccad66269.2025.11240989","relation":{},"subject":[],"published":{"date-parts":[[2025,10,26]]}}}