{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,11,28]],"date-time":"2024-11-28T13:10:28Z","timestamp":1732799428869,"version":"3.29.0"},"reference-count":23,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,6,24]],"date-time":"2024-06-24T00:00:00Z","timestamp":1719187200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,6,24]],"date-time":"2024-06-24T00:00:00Z","timestamp":1719187200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,6,24]]},"DOI":"10.1109\/icccnt61001.2024.10725846","type":"proceedings-article","created":{"date-parts":[[2024,11,4]],"date-time":"2024-11-04T23:06:46Z","timestamp":1730761606000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Reducing the delay of Non-volatile memory by Common centroid matching in sense amplifier"],"prefix":"10.1109","author":[{"given":"Kirti","family":"Gaur","sequence":"first","affiliation":[{"name":"Dr. B R Ambedkar National Institute of Technology,dept. Electronics and Communication (VLSI Design),Jalandhar,Punjab"}]},{"given":"Deepti","family":"Kakkar","sequence":"additional","affiliation":[{"name":"Dr. B R Ambedkar National Institute of Technology,dept. Electronics and Communication (VLSI Design),Jalandhar,Punjab"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ted.2006.884070"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2005.1568798"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2003.1249396"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2010.5617407"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/iccad.1994.629779"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/iedm.1999.824277"},{"key":"ref7","first-page":"145","article-title":"Fast and accurate parasitic capacitance models for layout-aware synthesis of analog circuits","volume-title":"Proc. ACM\/IEEE Des. Autom. Conf.,","author":"Agarwal"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/idt.2014.7038592"},{"article-title":"The Art of Analog Layout","year":"2001","author":"Hastings","key":"ref9"},{"volume-title":"Design of Analog CMOS Integrated Circuits","year":"2001","author":"Razavi","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/asp-dac52403.2022.9712576"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474244"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2022.3199307"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICAC3N53548.2021.9725671"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2226457"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.23919\/MIPRO.2019.8757026"},{"key":"ref17","first-page":"45","article-title":"Design and Analysis of low Power high-speed body bias controlled current latch sense amplifier","volume":"4","author":"Kumwat","year":"2015","journal-title":"International Journal of Advanced Research in IT and Engineering"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISPCC.2013.6663447"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/55.556094"},{"key":"ref20","first-page":"601","article-title":"Non-Volatile memory with reduced subthreshold leakage during read and erase operation","volume-title":"International Symposium on Circuits and Systems","author":"Rana"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/S0026-2714(97)00049-8"},{"article-title":"CMOS DIGITAL INTEGRATED CIRCUITS","year":"1996","author":"(STEVE)","key":"ref22"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/IIRW56459.2022.10032749"}],"event":{"name":"2024 15th International Conference on Computing Communication and Networking Technologies (ICCCNT)","start":{"date-parts":[[2024,6,24]]},"location":"Kamand, India","end":{"date-parts":[[2024,6,28]]}},"container-title":["2024 15th International Conference on Computing Communication and Networking Technologies (ICCCNT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10723818\/10723316\/10725846.pdf?arnumber=10725846","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,11,27]],"date-time":"2024-11-27T08:21:43Z","timestamp":1732695703000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10725846\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6,24]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/icccnt61001.2024.10725846","relation":{},"subject":[],"published":{"date-parts":[[2024,6,24]]}}}