{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T20:32:30Z","timestamp":1730233950272,"version":"3.28.0"},"reference-count":21,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iccd.2002.1106818","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T20:51:07Z","timestamp":1056574267000},"page":"488-493","source":"Crossref","is-referenced-by-count":2,"title":["Designing an asynchronous microcontroller using Pipefitter"],"prefix":"10.1109","author":[{"given":"I.","family":"Blunno","sequence":"first","affiliation":[]},{"given":"L.","family":"Lavagno","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/92.748198"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/TC.1982.1675937"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/ASYNC.2000.836975"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/ASPDAC.2001.913315"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/ASYNC.2000.836983"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1007\/BF01660034"},{"key":"ref16","first-page":"1","article-title":"Programming in VLSI: From communicating processes to delay-insensitive circuits","author":"martin","year":"1990","journal-title":"Developments in Concurrency and Communication"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1007\/BF00464358"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/ICCD.2000.878271"},{"year":"1996","author":"peeters","journal-title":"Single-Rail Handshake Circuits","key":"ref19"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/ASYNC.2000.836967"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/EDAC.1991.206431"},{"year":"1984","author":"chapiro","journal-title":"Globally-Asynchronous Locally-Synchronous Systems","key":"ref6"},{"key":"ref5","article-title":"Asynchronous scheduling\/binding using a genetic approach","author":"blunno","year":"2002","journal-title":"MIPRO 2002"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/TC.1977.1674910"},{"key":"ref7","first-page":"315","article-title":"Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers","volume":"e80 d","author":"cortadella","year":"1997","journal-title":"IEICE Transactions on Information and Systems"},{"year":"1993","author":"van berkel","journal-title":"Handshake Circuits An Asynchronous Architecture for VLSI Programming Volume 5 of International Series on Parallel Computation","key":"ref2"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1007\/978-0-387-35064-6_11"},{"key":"ref9","first-page":"5.4.1","article-title":"A micropipelined ARM","author":"furber","year":"1993","journal-title":"Proceedings of VLSI 93"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.1109\/ASYNC.2000.837017"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1145\/63526.63532"}],"event":{"acronym":"ICCD-02","name":"2002 IEEE International Conference on Computer Design","location":"Freiberg, Germany"},"container-title":["Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8166\/24311\/01106818.pdf?arnumber=1106818","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T18:11:15Z","timestamp":1489428675000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1106818\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iccd.2002.1106818","relation":{},"subject":[]}}