{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T09:05:23Z","timestamp":1729674323918,"version":"3.28.0"},"reference-count":26,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iccd.2003.1240920","type":"proceedings-article","created":{"date-parts":[[2004,5,6]],"date-time":"2004-05-06T16:18:03Z","timestamp":1083860283000},"page":"364-370","source":"Crossref","is-referenced-by-count":2,"title":["Distributed reorder buffer schemes for low power"],"prefix":"10.1109","author":[{"given":"G.","family":"Kucuk","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"O.","family":"Ergin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Ponomarev","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K.","family":"Ghose","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/40.755465"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/514191.514202"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871564"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859627"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.1995.386558"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/CMPCON.1995.512398"},{"key":"ref16","doi-asserted-by":"crossref","first-page":"36","DOI":"10.1145\/327070.327125","article-title":"Implementation of Precise Interrupts in Pipelined Processors","author":"smith","year":"1985","journal-title":"Proceedings of International Symposium on Computer Architecture"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.1996.552666"},{"key":"ref18","article-title":"Managing the Impact of Increasing Microprocessor Power Consumption","volume":"ql","author":"gunther","year":"2001","journal-title":"Intel Technology Journal"},{"key":"ref19","first-page":"41","article-title":"Shrinking Devices Put a Squeeze on System Packaging","volume":"39","author":"small","year":"1994","journal-title":"EDN"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2002.995719"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991122"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937452"},{"key":"ref5","first-page":"316","article-title":"Multiple-banked register file architectures","author":"cruz","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref8","article-title":"Reducing Register File Power Consumption by Exploiting Value Lifetime Characteristics","author":"hu","year":"2000","journal-title":"Workshop on Complexity-Effective Design"},{"key":"ref7","article-title":"PA-8000 Combines Complexity and Speed","volume":"8","author":"gwennap","year":"1994","journal-title":"Microprocessor Report"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/40.888701"},{"journal-title":"Intel Corporation","article-title":"The Intel Architecture Software Developers Manual","year":"1999","key":"ref9"},{"key":"ref1","article-title":"The SimpleScalartool set: Version 2.0","author":"burger","year":"1997","journal-title":"Tech Report"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/30350.30354"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1997.645806"},{"key":"ref21","article-title":"Dynamic Cluster Assignment Mechanisms","author":"canal","year":"2000","journal-title":"Proceedings of HPCA"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2003.1238021"},{"key":"ref23","article-title":"Lazy Retirement: A Power Aware Register Management Mechanism","author":"savransky","year":"2002","journal-title":"Workshop on Complexity-Effective Design"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/782837.782839"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176248"}],"event":{"name":"21st International Conference on Computer Design","acronym":"ICCD-03","location":"San Jose, CA, USA"},"container-title":["Proceedings 21st International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8790\/27821\/01240920.pdf?arnumber=1240920","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T02:52:17Z","timestamp":1497581537000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1240920\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/iccd.2003.1240920","relation":{},"subject":[]}}