{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,11]],"date-time":"2024-08-11T20:29:55Z","timestamp":1723408195111},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006,10]]},"DOI":"10.1109\/iccd.2006.4380804","type":"proceedings-article","created":{"date-parts":[[2007,11,13]],"date-time":"2007-11-13T21:54:59Z","timestamp":1194990899000},"source":"Crossref","is-referenced-by-count":7,"title":["Efficient Transient-Fault Tolerance for Multithreaded Processors Using Dual-Thread Execution"],"prefix":"10.1109","author":[{"given":"Yi","family":"Ma","sequence":"first","affiliation":[]},{"given":"Huiyang","family":"Zhou","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2003.1183532"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003566"},{"key":"ref12","first-page":"25","article-title":"Transient fault detection via simultaneous multithreading","author":"reinhardt","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1999.781037"},{"key":"ref14","doi-asserted-by":"crossref","DOI":"10.1109\/MICRO.2004.19","article-title":"Efficient Resource Sharing in Concurrent Error Detecting Supersalar Microarchitectures","author":"smolens","year":"2004","journal-title":"Proc 37th Ann Int Symp Microarch (MICRO'37)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379247"},{"key":"ref16","article-title":"Handling long-latency loads in a simultaneous multithreaded processor","author":"tullsen","year":"2001","journal-title":"Proc of the 34th Int Symp on Microarch (MICRO-34)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/232973.232993"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003565"},{"key":"ref19","article-title":"Hotleakage: a temperature-aware model of sub-threshold and gate leakage for architects","author":"zhang","year":"2003","journal-title":"Tech Reports CS-2003-05"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/268806.268810"},{"key":"ref3","first-page":"83","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"brooks","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/263580.263597"},{"key":"ref5","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-540-39707-6_6","article-title":"Improving memory latency aware fetch policies for SMT processors","author":"cazorla","year":"2003","journal-title":"Proc of the 5th Int Symp on High Perf Computing (ISHPC-5)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.1994.573184"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859631"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253243"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1999.809458"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598130"},{"key":"ref20","article-title":"Dual-core execution: building a highly scalable single-thread instruction window","author":"zhou","year":"2005","journal-title":"Proc of the 2005 Int Conf on Para Arch And Compiler Tech (PACT'05)"},{"key":"ref21","article-title":"A case for fault-tolerance and performance enhancement using Chip Multiprocessors","author":"zhou","year":"2005","journal-title":"IEEE Comp Arch Letters"}],"event":{"name":"2006 International Conference on Computer Design","location":"San Jose, CA, USA","start":{"date-parts":[[2007,10,1]]},"end":{"date-parts":[[2007,10,4]]}},"container-title":["2006 International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4380776\/4380777\/04380804.pdf?arnumber=4380804","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,4]],"date-time":"2019-05-04T10:59:48Z","timestamp":1556967588000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4380804\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,10]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iccd.2006.4380804","relation":{},"ISSN":["1063-6404"],"issn-type":[{"value":"1063-6404","type":"print"}],"subject":[],"published":{"date-parts":[[2006,10]]}}}