{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:51:43Z","timestamp":1759146703736,"version":"3.28.0"},"reference-count":35,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006,10]]},"DOI":"10.1109\/iccd.2006.4380806","type":"proceedings-article","created":{"date-parts":[[2007,11,13]],"date-time":"2007-11-13T16:54:59Z","timestamp":1194972899000},"page":"134-141","source":"Crossref","is-referenced-by-count":26,"title":["Polaris: A System-Level Roadmap for On-Chip Interconnection Networks"],"prefix":"10.1109","author":[{"given":"Vassos","family":"Soteriou","sequence":"first","affiliation":[]},{"given":"Noel","family":"Eisley","sequence":"additional","affiliation":[]},{"given":"Hangsheng","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Bin","family":"Li","sequence":"additional","affiliation":[]},{"given":"Li-Shiuan","family":"Peh","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"crossref","first-page":"105","DOI":"10.1109\/MICRO.2003.1253187","article-title":"Power-driven design of router microarchitectures in on-chip networks","author":"wang","year":"2003","journal-title":"Proc of the International Symposium on Microarchitecture"},{"key":"ref32","first-page":"294","article-title":"Orion: A power-performance simulator for interconnection networks","author":"wang","year":"2002","journal-title":"Proc of the International Symposium on Microarchitecture"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.820523"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176256"},{"journal-title":"Wattch release site","year":"2006","key":"ref35"},{"key":"ref34","first-page":"238","article-title":"A technology-aware and energy-oriented topology for on-chip networks","volume":"1","author":"wang","year":"2005","journal-title":"Proceedings of Design Automation and Test in Europe Conference"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2003.1213361"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/5.920580"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1268999"},{"key":"ref13","first-page":"260","article-title":"Non-tree routing for reliability and yield improvement","author":"kahng","year":"2002","journal-title":"Proc of the International Conference on Computer-Aided Design"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1985.6312192"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996809"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.137"},{"journal-title":"Orion release web site","year":"2006","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1002\/047120644X"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2001.903268"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOTS.2006.9"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1145\/500001.500009","article-title":"powering networks on chips","author":"benini","year":"2001","journal-title":"International Symposium on System Synthesis (IEEE Cat No 01EX526) ISSS-01"},{"key":"ref27","article-title":"CACTI 3.0: An integrated cache timing, power and area model","author":"shivakumar","year":"0","journal-title":"Western Research Laboratory (WRL) Research Report"},{"key":"ref3","first-page":"83","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"brooks","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"ref29","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1145\/1028176.1006733","article-title":"Evaluation of the Raw microprocessor: An exposed-wire-delay architecture for ILP and streams","author":"taylor","year":"2004","journal-title":"Proc of the International Symposium on Computer Architecture"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871531"},{"journal-title":"System-level living roadmap thrust","article-title":"Gigascale Systems Research Center (GSRC)","year":"2006","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1023833.1023849"},{"journal-title":"Device Group","year":"2006","key":"ref2"},{"key":"ref1","first-page":"381","article-title":"Variational delay metrics for interconnect timing analysis","author":"agarwal","year":"2004","journal-title":"Proceedings 41st Design Automation Conference 2004 DAC"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45828-X_8"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1268972"},{"journal-title":"Polaris V 1 0 complete NoC roadmapping tables","year":"2006","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493930"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859667"},{"journal-title":"PoPNet release web site","year":"2006","key":"ref23"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.35"},{"journal-title":"International Technology Roadmap for Semiconductors","article-title":"Semiconductcr Industry Association","year":"2006","key":"ref25"}],"event":{"name":"2006 International Conference on Computer Design","start":{"date-parts":[[2007,10,1]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2007,10,4]]}},"container-title":["2006 International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4380776\/4380777\/04380806.pdf?arnumber=4380806","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,17]],"date-time":"2017-06-17T20:35:46Z","timestamp":1497731746000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4380806\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,10]]},"references-count":35,"URL":"https:\/\/doi.org\/10.1109\/iccd.2006.4380806","relation":{},"ISSN":["1063-6404"],"issn-type":[{"type":"print","value":"1063-6404"}],"subject":[],"published":{"date-parts":[[2006,10]]}}}