{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T20:27:15Z","timestamp":1725654435974},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006,10]]},"DOI":"10.1109\/iccd.2006.4380860","type":"proceedings-article","created":{"date-parts":[[2007,11,13]],"date-time":"2007-11-13T21:54:59Z","timestamp":1194990899000},"page":"485-490","source":"Crossref","is-referenced-by-count":4,"title":["Microarchitecture and Performance Analysis of Godson-2 SMT Processor"],"prefix":"10.1109","author":[{"given":"Zusong","family":"Li","sequence":"first","affiliation":[]},{"given":"Xianchao","family":"Xu","sequence":"additional","affiliation":[]},{"given":"Weiwu","family":"Hu","sequence":"additional","affiliation":[]},{"given":"Zhimin","family":"Tang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"crossref","first-page":"392","DOI":"10.1109\/ISCA.1995.524578","article-title":"Simultaneous multithreading: Maximizing on-chip parallelism","author":"tullsen","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/MM.2005.35"},{"key":"ref10","article-title":"Cache Consistency and Sequential Consistency","author":"goodman","year":"1989","journal-title":"Technical Report No 61 SCI committee"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/40.621209"},{"key":"ref5","first-page":"191","author":"tullsen","year":"1996","journal-title":"Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor Proceedings of 23nd Annual International Symposium on Computer Architecture"},{"key":"ref8","doi-asserted-by":"crossref","DOI":"10.1145\/17356.17406","article-title":"Memory Access Buffering In Multiprocessors","author":"dubios","year":"1986","journal-title":"Proceedings of the 13th International Symposium on Computer Architecture"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1007\/s11390-005-0243-6"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/MM.2004.1289290"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/TC.1979.1675439"},{"key":"ref1","first-page":"4","article-title":"Hyper-Threading Technology Architecture and Microarchitecture","author":"marr","year":"2002","journal-title":"Intel Technology Journal or"}],"event":{"name":"2006 International Conference on Computer Design","start":{"date-parts":[[2007,10,1]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2007,10,4]]}},"container-title":["2006 International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4380776\/4380777\/04380860.pdf?arnumber=4380860","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,14]],"date-time":"2023-05-14T18:15:32Z","timestamp":1684088132000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4380860\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,10]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/iccd.2006.4380860","relation":{},"ISSN":["1063-6404"],"issn-type":[{"type":"print","value":"1063-6404"}],"subject":[],"published":{"date-parts":[[2006,10]]}}}