{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,2]],"date-time":"2025-08-02T16:59:26Z","timestamp":1754153966383,"version":"3.41.2"},"reference-count":9,"publisher":"IEEE","license":[{"start":{"date-parts":[[2007,10,1]],"date-time":"2007-10-01T00:00:00Z","timestamp":1191196800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2007,10,1]],"date-time":"2007-10-01T00:00:00Z","timestamp":1191196800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,10]]},"DOI":"10.1109\/iccd.2007.4601872","type":"proceedings-article","created":{"date-parts":[[2008,8,21]],"date-time":"2008-08-21T11:14:39Z","timestamp":1219317279000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Twiddle factor transformation for pipelined FFT processing"],"prefix":"10.1109","author":[{"family":"In-Cheol Park","sequence":"first","affiliation":[{"name":"School of EECS, Korea Advanced Institute of Science and Technology, Daejeon, Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"WonHee Son","sequence":"additional","affiliation":[{"name":"School of EECS, Korea Advanced Institute of Science and Technology, Daejeon, Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Ji-Hoon Kim","sequence":"additional","affiliation":[{"name":"School of EECS, Korea Advanced Institute of Science and Technology, Daejeon, Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/TCE.2003.1205450"},{"key":"ref3","first-page":"257","article-title":"Designing pipeline FFT processor for OFDM (de)modulation","author":"he","year":"1998","journal-title":"Proc IEEE URSI Int Symp Signals Syst Electron"},{"year":"1975","author":"rabiner","journal-title":"Theory and Application of Digital Signal Processing","key":"ref6"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1049\/el:19840012"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/JSSC.2005.852007"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/T-C.1974.223800"},{"key":"ref2","first-page":"131","article-title":"Design and Implementation of a 1024-point pipeline FFT processors","author":"he","year":"1998","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/TCSI.2006.875167"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1090\/S0025-5718-1965-0178586-1"}],"event":{"name":"2007 25th International Conference on Computer Design ICCD 2007","start":{"date-parts":[[2007,10,7]]},"location":"Lake Tahoe, CA, USA","end":{"date-parts":[[2007,10,10]]}},"container-title":["2007 25th International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4591423\/4601871\/04601872.pdf?arnumber=4601872","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,23]],"date-time":"2025-07-23T18:35:40Z","timestamp":1753295740000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/4601872\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,10]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/iccd.2007.4601872","relation":{},"subject":[],"published":{"date-parts":[[2007,10]]}}}