{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T16:27:46Z","timestamp":1725553666802},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,10]]},"DOI":"10.1109\/iccd.2009.5413155","type":"proceedings-article","created":{"date-parts":[[2010,2,17]],"date-time":"2010-02-17T13:35:32Z","timestamp":1266413732000},"page":"201-206","source":"Crossref","is-referenced-by-count":1,"title":["A hierarchical approach towards system level static timing verification of SoCs"],"prefix":"10.1109","author":[{"given":"Rupsa","family":"Chakraborty","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dipanwita Roy","family":"Chowdhury","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"155","article-title":"Timing macro-modeling of IP blocks with crosstalk","author":"chen","year":"2004","journal-title":"IEEE\/ACM International Conference on Computer-Aided Design ICCAD'04"},{"key":"ref3","first-page":"415","article-title":"Timing Model Reduction for Hierarchical Timing Analysis","author":"zhou","year":"2006","journal-title":"IEEE\/ACM International Conference on Computer-Aided Design ICCAD'06"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2008.68"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2002.1012611"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.810740"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2002.1012610"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1997.606593"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2002.1012612"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2006.02.007"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1995.480143"},{"article-title":"Reuse Methodology Manual for System-on-a-Chip Designs","year":"2002","author":"keating","key":"ref1"}],"event":{"name":"2009 IEEE International Conference on Computer Design (ICCD 2009)","start":{"date-parts":[[2009,10,4]]},"location":"Lake Tahoe, CA, USA","end":{"date-parts":[[2009,10,7]]}},"container-title":["2009 IEEE International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5406656\/5413104\/05413155.pdf?arnumber=5413155","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T16:22:28Z","timestamp":1489854148000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5413155\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,10]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iccd.2009.5413155","relation":{},"subject":[],"published":{"date-parts":[[2009,10]]}}}