{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T18:56:50Z","timestamp":1725562610564},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,10]]},"DOI":"10.1109\/iccd.2009.5413167","type":"proceedings-article","created":{"date-parts":[[2010,2,17]],"date-time":"2010-02-17T18:35:32Z","timestamp":1266431732000},"page":"117-124","source":"Crossref","is-referenced-by-count":3,"title":["VariPipe: Low-overhead variable-clock synchronous pipelines"],"prefix":"10.1109","author":[{"given":"Navid","family":"Toosizadeh","sequence":"first","affiliation":[]},{"given":"Safwat G.","family":"Zaky","sequence":"additional","affiliation":[]},{"given":"Jianwen","family":"Zhu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"ASIC Design Flow","year":"0","key":"ref10"},{"journal-title":"DLX GCC","year":"0","key":"ref11"},{"journal-title":"MiBench","year":"0","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/313817.313944"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"379","DOI":"10.1145\/1391469.1391571","article-title":"automatic architecture refinement techniques for customizing processing elements","author":"gorjiara","year":"2008","journal-title":"2008 45th ACM\/IEEE Design Automation Conference DAC"},{"journal-title":"NISC Technology website","year":"0","key":"ref15"},{"journal-title":"Noise Reduction Techniques in Electronic Systems","year":"1988","author":"ott","key":"ref16"},{"journal-title":"App note 3512 Spread-spectrum clock oscillators lower EMI","year":"2005","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.34"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1465342"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.898732"},{"key":"ref3","first-page":"982","article-title":"A fully-automated desynchronization flow for synchronous circuits","author":"andrikos","year":"2007","journal-title":"Design Automation Conf"},{"journal-title":"Cadence Design Systems Inc","article-title":"Clock domain crossing: Closing the loop on clock domain functional implementation problems","year":"2004","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/63526.63532"},{"journal-title":"Computer architecture A quantative approach","year":"2007","author":"hennessey","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.1268991"},{"journal-title":"STRIP A Self-Timed RISC Processor","year":"1992","author":"dean","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/266021.266029"},{"journal-title":"ASPIDA","year":"0","key":"ref9"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.1274005"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:19960704"}],"event":{"name":"2009 IEEE International Conference on Computer Design (ICCD 2009)","start":{"date-parts":[[2009,10,4]]},"location":"Lake Tahoe, CA, USA","end":{"date-parts":[[2009,10,7]]}},"container-title":["2009 IEEE International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5406656\/5413104\/05413167.pdf?arnumber=5413167","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T04:56:09Z","timestamp":1497848169000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5413167\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,10]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iccd.2009.5413167","relation":{},"subject":[],"published":{"date-parts":[[2009,10]]}}}