{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,14]],"date-time":"2026-02-14T10:32:45Z","timestamp":1771065165040,"version":"3.50.1"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,10]]},"DOI":"10.1109\/iccd.2010.5647784","type":"proceedings-article","created":{"date-parts":[[2010,12,9]],"date-time":"2010-12-09T15:42:09Z","timestamp":1291909329000},"page":"203-208","source":"Crossref","is-referenced-by-count":20,"title":["Routability-driven flip-flop merging process for clock power reduction"],"prefix":"10.1109","author":[{"given":"Zhi-Wei","family":"Chen","sequence":"first","affiliation":[]},{"given":"Jin-Tai","family":"Yan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","first-page":"690","article-title":"Flip-flop and repeater insertion for early interconnect planning","author":"lu","year":"2002","journal-title":"Design Automation and Test in Europe"},{"key":"2","first-page":"3","article-title":"Low-power circuit design for multimedia CMOS VLSI's","author":"sakurai","year":"1996","journal-title":"International Workshop on Synthesis and System Integration of Mixed Information Technologies"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2325-3"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2002.1016875"},{"key":"6","first-page":"147","article-title":"Blockage-aware routing tree construction with concurrent buffer and flip-flop insertion","author":"chen","year":"2007","journal-title":"International Workshop on Synthesis and System Integration of Mixed Information Technologies"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2004.1283652"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2003.1240906"},{"key":"8","year":"2010","journal-title":"Using Multi-Bit Flip-Flop for Clock Power Saving"}],"event":{"name":"2010 IEEE International Conference on Computer Design (ICCD 2010)","location":"Amsterdam, Netherlands","start":{"date-parts":[[2010,10,3]]},"end":{"date-parts":[[2010,10,6]]}},"container-title":["2010 IEEE International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5640356\/5647518\/05647784.pdf?arnumber=5647784","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T10:55:05Z","timestamp":1490093705000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5647784\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,10]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/iccd.2010.5647784","relation":{},"subject":[],"published":{"date-parts":[[2010,10]]}}}